18
Agere Communications Inc.
Data Sheet
September 2001
L7585G Full-Feature, Low-Power SLIC and Switch
Applications
Tip/Ring Protection
The L7585 SLIC has integrated overvoltage tertiary
protection diodes in the tip and ring paths. The device
also has an integrated thermal shutdown circuit which
places tip/ring drivers in a high-impedance state when
the die temperature exceeds 160 °C.
The SLIC requires the following to survive lightning and
power cross requirements:
I
Fusible elements or PTCs
I
Current-limiting resistors
I
A secondary protector
Thermal fuse/surge resistor modules that satisfy the
various requirements can be purchased from
MMC
.
Protection resistors should have a tolerance of ±1%
and a ratio tolerance of ±0.5%. The suppressor break-
over voltage of the secondary protector should be set
as low as possible. Select a value just above the maxi-
mum peak ring signal and maximum battery voltage.
NDET Under Fault Condition
I
The state of NDET is not guaranteed with loss of bat-
tery.
I
In the ringing state, RRNG floating or with only dc on
the ringing source, NDET will produce an off-hook
because there are not zero crossings of ringing to
cause an on-hook.
I
In the ringing state with only ac (>40 Vrms) on the
ringing source, an on-hook will be produced after the
second zero crossing of the ringing waveform,
because there is no dc component to the ringing cur-
rent.
I
In the ringing state, if the resistor between RSW and
PR is open, there will likely be a large voltage at the
ringing input (due to capacitive loading) and ring trip
will be asserted after the second zero crossing of
ringing. Because there is no guarantee of the load at
PR in this condition, there can be no guarantee of
the state on NDET in this condition.
I
If the device enters into thermal shutdown due to a
fault that causes an off-hook, the off-hook indication
will be stable as the device cycles in and out of ther-
mal shutdown. If the fault does not cause an off-
hook, NDET will cycle between on- and off-hook as
the device cycles in and out of thermal shutdown.
Power, Clocking, and Layout
The SLIC requires +5 V (V
CCA
and V
CCD
) and a nega-
tive battery voltage (V
BAT
) to operate. The integrated
switches require a 10 V or 12 V supply (V
SP
) and a TTL
clock (CLK) to operate. CLK requires a frequency
between 1.0 MHz to 2.048 MHz with a 50% duty cycle.
SW1, SW3, and SW6 will not operate without CLK
applied.
A four- or six-layer board is recommended. Analog and
battery grounds should be laid out as a plane and a
layer, and tied together at the device. Digital ground
can also be tied to this plane or run separately. V
SP
is
referenced to DGND. V
CC
can be run as individual
traces and can reside on the same layer as signal
paths. V
CCA
and V
CCD
can be tied together at the SLIC.
Placement of the talk battery is not critical.
The ring bus should be on a separate layer from the
SLIC/codec interface signal leads, and traces should
run perpendicular if the traces must cross. TXI, VITR,
and ITR are the sensitive nodes on the SLIC. Transmit
runners should be run in pairs, and receive runners
should be run in pairs between the SLIC and the
codec. A channel-to-channel spacing should be main-
tained.