參數(shù)資料
型號(hào)： LUCL8575BP
英文描述： Dual-Resistive,Low-Cost Subscriber Line Interface Circuit(SLIC)
中文描述： 雙電阻，低成本用戶線接口電路（SLIC）
文件頁(yè)數(shù)： 14/36頁(yè)
文件大?。?/td> 633K
代理商： LUCL8575BP
L8575
Dual-Resistive, Low-Cost SLIC
Advance Data Sheet
March 1997
14
Lucent Technologies Inc.
Electrical Characteristics
(continued)
Serial Interface and Logic
The tables below summarize the parameter and timing requirements for logic inputs CLK, EN, DI, and DO.
Table 8. Logic Inputs (CLK, EN, and DI) and Outputs (DO)
1.
Unless otherwise specified, all logic voltages are referenced to DGND.
2.This parameter is not tested in production. It is guaranteed by design and device characterization.
Table 9. Timing Requirements for CLK, EN, DI, and DO
1.Unless otherwise specified, all times are measured from the 50% point of logic transitions.
2.This parameter is not tested in production. It is guaranteed by design and device characterization.
Parameter
1
Symbol
V
IH
V
IL
I
IN
V
OH
V
OL
I
OSS
C
OL
Min
2
0
—
Max
V
DDD
0.8
±
50
V
DDD
0.4
35
50
Unit
V
V
μ
A
V
V
mA
pF
High-level Input Voltage
Low-level Input Voltage
Input Bias Current (high and low)
High-level Output Voltage (I
OUT
= –100
μ
A)
Low-level Output Voltage (I
OUT
= 180
μ
A)
Output Short-circuit Current (V
OUT
= V
DDD
)
Output Load Capacitance
2
V
DDD
– 1.5
0
1
0
Parameter
1
Symbol
t
R
, t
F
C
IN
f
MAX
t
PCO
t
PCR
t
SDC
t
SDE
t
SEC
t
HDC
t
HEC
t
WCK
t
WEN
Min
0
—
—
0
0
150
150
150
50
50
400
800
Max
70
5
1.25
350
10
—
—
—
—
—
—
—
Unit
ns
pF
MHz
ns
μ
s
ns
ns
ns
ns
ns
ns
ns
Input Rise and Fall Time, CLK & EN (10% to 90%)
2
Maximum Input Capacitance
2
Maximum CLK Frequency (50% duty cycle)
Propagation Delay, CLK to DO
2
Propagation Delay, EN to RD Outputs
2
Minimum Setup Time from DI to CLK
2
Minimum Setup Time from DI to EN
2
Minimum Setup Time from EN to CLK
2
Minimum Hold Time from CLK to DI
2
Minimum Hold Time from EN to CLK
2
Minimum Pulse Width of CLK
Minimum Pulse Width of EN
相關(guān)PDF資料
PDF描述
LUCL8575BP-TR Dual-Resistive,Low-Cost Subscriber Line Interface Circuit(SLIC)
LUCL8576BP-D Dual Ringing SLIC
LUCL8576BP-DT Dual Ringing SLIC
LUCL9214AAJ-D GT 19C 19#12 PIN RECP
LUCL9214AAJ-DT Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GT; No. of Contacts:2; Connector Shell Size:24; Connecting Termination:Solder; Circular Shell Style:Square Flange Receptacle; Body Style:Straight
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LUCL8575BP-TR 制造商:AGERE 制造商全稱:AGERE 功能描述:Dual-Resistive,Low-Cost Subscriber Line Interface Circuit(SLIC)
LUCL8576BP-D 制造商:AGERE 制造商全稱:AGERE 功能描述:Dual Ringing SLIC
LUCL8576BP-DT 制造商:AGERE 制造商全稱:AGERE 功能描述:Dual Ringing SLIC
LUCL9214AA-DT 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Ringing SLIC
LUCL9214AAJ-D 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Ringing SLIC
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*