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| 型號： | LUCL9218GAR-D |
| 英文描述： | CAT5E PATCH CABLES SNAGLESS,BLUE 50 FT |
| 中文描述： | 低成本線接口 |
| 文件頁數(shù)： | 9/30頁 |
| 文件大小： | 378K |
| 代理商： | LUCL9218GAR-D |
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Agere Systems Inc.
9
Data Sheet
November 2001
L9218A/G Low-Cost Line Interface
Electrical Characteristics
(continued)
Table 5. 2-Wire Port
1. The longitudinal current is independent of dc loop current.
2. Current-limit I
LIM
is programmed by a resistor, R
PROG
, from pin I
PROG
to DCOUT. I
LIM
is specified at the loop resistance where current limiting
begins (see Figure 13).
3. This parameter is not tested in production. It is guaranteed by design and device characterization.
4. Specification is reduced to |V
BAT1
+ 10.5 V| minimum when V
BAT1
= –70 V at 85
°
C.
5. Longitudinal balance of circuit card will depend on loop series protection resistor matching and magnitude. More information is available in
the Applications section of this document.
Parameter
Min
80
Typ
—
Max
—
Unit
mA
Tip or Ring Drive Current = dc + Longitudinal + Signal
Currents
Signal Current
15
—
—
mArms
Longitudinal Current Capability per Wire
1
8.5
15
—
mArms
dc Loop Current Limit
2
:
Allowed Range Including Tolerance
3
Accuracy (R
LOOP
= 100
, V
BAT
= –48 V)
Powerup Open Loop Voltage Levels:
Common-mode Voltage
Differential Voltage V
BAT
= –48 V
4
(Gain = 2)
Differential Voltage V
BAT
= –48 V
4
(Gain = 7.86)
15
—
—
±
5
45
—
mA
%
—
|V
BAT
+ 7.5|
|V
BAT
+ 8.0|
V
BAT
/2
|V
BAT
+ 6.5|
|V
BAT
+ 6.5|
—
|V
BAT
+ 5.9|
|V
BAT
+ 5.9|
V
V
V
Disconnect State:
Leakage
—
10
150
μ
A
dc Feed Resistance (for I
LOOP
below regulation level) (does
not include protection resistor)
—
80
100
Loop Resistance Range (–3.17 dBm overload into
900
; not including protection):
I
LOOP
= 20 mA at V
BAT
= –48 V
1800
—
—
Longitudinal to Metallic Balance—IEEE
Std. 455
(See Figure 7)
5
:
200 Hz to 3400 Hz
58
61
—
dB
Metallic to Longitudinal Balance (open loop):
200 Hz to 4 kHz
40
—
—
dB
RFI Rejection (See Figure 8)
3
, 0.5 Vrms, 50
Source,
30% AM Mod 1 kHz:
500 kHz to 100 MHz
—
—
—
–55
—
–45
—
dBV
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LUCL9218GAR-DT | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface |
| LUCL9219AAR-D | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and Dual Current Limit |
| LUCL9219AAR-DT | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and Dual Current Limit |
| LUCL9219GAR-D | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and Dual Current Limit |
| LUCL9219GAR-DT | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and Dual Current Limit |
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