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| 型號： | LUCL9310GP-D |
| 英文描述： | Line Interface and Line Access Circuit Full-Feature SLIC,Ringing Relay,and Test Access Device |
| 中文描述： | 線路接口和線路接入電路全功能用戶接口，振鈴繼電器，測試接入設備 |
| 文件頁數(shù)： | 37/60頁 |
| 文件大小： | 1053K |
| 代理商： | LUCL9310GP-D |
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Data Sheet
July 2001
Full-Feature SLIC, Ringing Relay, and Test Access Device
L9310 Line Interface and Line Access Circuit
Agere Systems Inc.
37
Applications
(continued)
dc Characteristics
(continued)
Battery Feed
(continued)
12-3050.g (F)
Notes:
V
BAT1
= –48 V.
V
BAT2
= –24 V.
I
LIM
= 40 mA (R
PROG
= 66.5 k
).
Figure 14. L9310 Loop Current vs. Loop Voltage
Starting from the on-hook condition and going through
to a short circuit, the curve passes through two regions:
Region 1: On-hook and low loop currents: the slope
corresponds to the dc feed resistance of the SLIC (plus
any series resistance). The open-circuit voltage is the
battery voltage less the overhead voltage of the device.
Region 2: Current limit: the dc current is limited to a
value determined by V
PROG
. This region of the dc tem-
plate has a high resistance (10 k
).
Notice that the I-V curve is uninterrupted when the
power is shifted from the high-voltage battery to the
low-voltage battery (if auxiliary battery option is used).
This is shown in Figure 12 in the Automatic Battery
Switch section.
Battery Reversal Rate
The rate of battery reverse is controlled or ramped by
capacitors FB1 and FB2. A chart showing FB1 and FB2
values versus typical ramp time is given below. Leave
FB1 and FB2 open if it is not desired to ramp the rate of
battery reversal.
Table 19. FB1 and FB2 Values vs. Typical
Ramp Time
* Typical recommended value for C
FB1
and C
FB2
is less
than 0.033
μ
F.
Longitudinal to Metallic Balance
Longitudinal to metallic balance at PT/PR is specified in
the Electrical Characteristics section of this data sheet.
Supervision
Loop Closure
Loop closure supervision threshold is programmed via
an applied voltage source or ground, through a resistor
at the LCTH input. Loop closure status is presented at
the NSTAT output. NSTAT is an unlatched output that
represents either the loop closure or ring trip status,
depending on the device state. See Table 2 and
Table 3 for more details. Loop closure threshold current
(I
LCTH
) is set by:
= I
LCTH
(mA)
where:
R
LCTH
is a resistor from the LCTH node to ground or a
voltage source.
V
LCTH
is ground or an external voltage source.
There is a built-in hysteresis associated with the loop
closure detector. The above equation describes the on-
hook to off-hook threshold. To help prevent false
glitches, the off-hook to on-hook threshold will be a typ-
ical 20% lower than the corresponding on-hook to off-
hook threshold.PPM injection can cause false loop clo-
sure indication. Connect a 0.01
μ
F capacitor to a 0.1
μ
F
capacitor from this node, LCF to V
CC
to filter the loop
closure detector the larger the capacitor the higher the
filtering. If loop closure filtering is not required, leave
LCF open.
L
0
5
10
25
0
20
30
40
50
LOOP VOLTAGE (V)
15
20
10
1
R
dc
30
45
35
40
1
10 k
C
FB1
and C
FB2
*
0.01
μ
F
0.1
μ
F
0.22
μ
F
0.47
μ
F
1.0
μ
F
1.22
μ
F
1.3
μ
F
1.4
μ
F
1.6
μ
F
Transition Time
20 ms
220 ms
440 ms
900 ms
1.8 s
2.25 s
2.5 s
2.7 s
3.2 s
REF
R
LCTH
k
V
LCTH
)
–
(
)
250 V
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