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參數(shù)資料
| 型號： | LUCW3020CCS-DB |
| 英文描述： | GSM Multiband RF Transceiver |
| 中文描述： | 手機(jī)多頻段射頻收發(fā)器 |
| 文件頁數(shù)： | 21/44頁 |
| 文件大?。?/td> | 409K |
| 代理商： | LUCW3020CCS-DB |
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Advance Data Sheet
December 1999
W3020 GSM Multiband RF Transceiver
Lucent Technologies Inc.
21
Programming Information
(continued)
TR Register
The TR register is the transmit/receive register for W3020. It contains bits for setting various transmit and
receive modes, setting receive gain, etc. It is expected that this register would be written several times during a
frame.
1
Last bit in serial sequence
First bit in serial sequence
Bit No.
Bit
Table 13. TR Register
2
3
4
5
6
7
8
9
10
11
T1
12
T2
DS
DP
FTR
T3
13
14
15
16
17
T4
18
T5
19
T6
MO1
MO2
MO3
20
21
22
23
B
24
A0=0
A1=0
G0
G1
G2
G3
G4
G5
G6
T0
A2=1
Bit Number
Bit
SC1 Standard
Setting
1
0
—
Function
24
23
22
21
20
19
18
17
16
A2
B
MO3
MO2
MO1
T6
T5
T4
T3
Address Bit
Band Select (See Table 14.)
RX, TX, Synthesizer Mode (See Table 15.)
0
0
0
0
Disable LO2 Circuitry in All Modes (See Table 16.)
Disable LO1 Circuitry (W3000 excluded) (See Table 17.)
RX IF Duty Cycle Corrector Disable (See Table 18.)
GSM1800 TX IF LO Divide-by-3 Duty Cycle Corrector Disable (See
Table 19.)
LPF Tune Filter Request (See Table 20.)
dc Precharge Only (See Table 21.)
dc Correction Skip (See Table 22.)
LO2 Divide by 2 or Divide-by-3 Select for TX IF (See Table 23.)
TX IF LO Divide-by-6 Select (See Table 24.)
TX IF Duty-Cycle Corrector Disable (See Table 25.)
Digital Gain Control RX IF/IQ-Baseband (See Table 26.)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
FTR
DP
DS
T2
T1
T0
G6
G5
G4
G3
G2
G1
G0
A1
A0
1
0
0
0
0
0
—
1
0
0
Digital Gain Control LNA On/Off (See Table 26.)
Address Bits
Note: The TR register is reset to an all-zero state after the reset bit in the CONFIG register has been set high.
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