參數(shù)資料
型號(hào): LV71081E
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: 14 X 20 MM, QIP-100
文件頁數(shù): 8/31頁
文件大?。?/td> 375K
代理商: LV71081E
LV71081E
No.A1610-16/31
4. INITIALIZE AND OTHERS
SW LSI is initialized as the following mode for circuit protection. Please see “SERIAL CONTROL TABLE”.
Characteristics of the SDA and SCL 1/0 stages for SW LSI
Parameter
Symbol
Min
Max
Unit
LOW level input voltage
VIL
0
0.8
V
HIGH level input voltage
VIH
3.0
5.0
V
LOW level output current
IOL
3.0
mA
SCL clock frequency
fSCL
400
kHz
Set-up time for a repeated START condition
tSU : STA
0.6
μs
Hold time START condition. After this period, the first clock pulse is generated.
tHD : STA
0.6
μs
LOW period of the SCL clock
tLOW
1.3
μs
Rise time of both SDA and SDL signals
tR
0
0.3
μs
HIGH period of the SCL clock
tHIGH
0.6
μs
Fall time of both SDA and SDL signals
tF
0
0.3
μs
Data hold time:
tHD : DAT
0
0.9
μs
Data set-up time
tSU : DAT
100
ns
Set-up time for STOP condition
tSU : STO
0.6
μs
BUS fredd time between a STOP and START condition
tBUF
1.3
μs
Fig.2 Definition of timing.
tSU:STO
tSU:DAT
tF
tR
tHD:DAT
tLOW
tHIGH
tHD:STA
tSU:STA
SCL (86pin)
SDA (87pin)
tBUF
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