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參數(shù)資料
| 型號： | LX1725ILQ-TR |
| 廠商： | MICROSEMI CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 16 W, 2 CHANNEL, AUDIO AMPLIFIER, PQCC32 |
| 封裝： | 7 X 7 MM, ROHS COMPLIANT, PLASTIC, MLPQ-32 |
| 文件頁數(shù)： | 23/23頁 |
| 文件大?。?/td> | 377K |
| 代理商： | LX1725ILQ-TR |
LX1725
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
9
Page
WWW
.Microse
m
i
.CO
M
15W+15W Stereo Class-D Amplifier
Filterless 30W Mono in BTL
Copyright
2004
Rev. 1.1, 2005-11-04
TM
FUNCTION DESCRIPTION
OSCILLATOR
LX1725 has a fixed PWM modulation frequency, but it is
programmable by using an external capacitor connected to COSC
pin to GND. The switching frequency is approximately 235KHz
with capacitor’s value 220pF. With the capacitor value given, the
switching frequency can be calculated as follows:
FOSC = 52000 / COSC
FOSC in KHz, and COSC in pF.
The suggested switching frequency is 250KHz
SYNCHRONIZATION
Two or more LX1725 oscillators can be configured for
synchronous operation. One unit, the master, is programmed for
the desired frequency with COSC as usual, also with the MASTER
pin tied to V5V. The SYNC pin and the COSC pin of the slave
units should be tied to the SYNC pin and the COSC pin of the
master unit respectively. The MASTER pin of slave components
is tied to GND. In this configuration, the SYNC pins of the slave
units begin receiving instead of transmitting clock pulses. Also,
the COSC pins quit driving the PWM capacitor in the slave units.
Note that for optimum performance, all slave units should be
located as close to the master unit as possible (Figure 2).
LX1725
(Master)
V5V
Cosc
Master
SYNC
LX1725
(Slave)
Cosc
Master
SYNC
Figure 2 – Two Devices Synchronized Block Diagram
POWER ON RESET (POR)
At start up or upon recovery from a fault condition, an internal
“hiccup” counter counts 65536 clock cycles before allowing the
outputs to begin switching.
See the POR timing sequence in
Figure 3.
STBY
FLAG
err amp
Output PWM
65536 clock cycles
Figure 3 – Power-On-Reset Timing Sequence
The MASTER pin, as mentioned in SYNCHRONIZATION, is for
multi devices operation. It is also a Quad-level control pin with
three thresholds to enable Master/Slave and the “Quick” test mode.
Quick mode forces the internal 65536 clock counter to be
bypassed in order to speed-up production testing; this is usually for
factory production test purposes.
V @ Master
Mode
< V5V/4
Slave, Normal Mode
< V5V/2, >V5V/4
Slave, Quick mode
< 3*V5V/4, >V5V/2
Master, Quick mode
> 3*V5V/4
Master, Normal mode
GAIN SELECTION/MUTE
The channel gain can be programmed between 26dB and 20dB by
setting the HIGAIN pin to V5V or to GND. The MUTE pin is a
Tri-level control pin for test purposes. When this pin is set to
greater than V5V/2, the audio signal path is muted. For voltages
between V5V/4 and V5V/2, the audio gain will be reduced by
6dB. This allows the “Low Gain” mode to be tested. For voltages
less than V5V/4, the normal gain is in place (Figure 4).
R
2R
V5V
14dB
20dB
MUTE
LX1725
(Master)
MUTE
14dB
Figure 4 – Gain Selection Block Diagram
DD
EE
SS
CC
RR
IIPP
TT
IIOO
NN
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