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參數(shù)資料
| 型號(hào)： | LXT351 |
| 廠商： | Intel Corp. |
| 英文描述： | T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation |
| 中文描述： | 短途的T1/E1收發(fā)器與晶體抖動(dòng)衰減 |
| 文件頁數(shù)： | 34/46頁 |
| 文件大?。?/td> | 1132K |
| 代理商： | LXT351 |
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LXT351
—
T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation
34
Datasheet
Table 22. DC Electrical Characteristics
Parameter
Sym
Min
Typ
1
Max
Unit
Test Conditions
Digital I/O pins
High level input voltage
2
(pins 1-5, 9-12, 17, 23-28)
3
V
IH
2.0
–
–
V
Low level input voltage
2
(pins 1-5, 9-12, 17, 23-28)
3
V
IL
–
–
0.8
V
High level output voltage
2
(pins 6-8, 10, 11,23, 28)
3
V
OH
2.4
–
–
V
I
OUT
= -400
μ
A
Low level output voltage
2
(pins 6-8, 10, 11,23, 28)
3
V
OL
–
–
0.4
V
I
OUT
= 1.6 mA
Input leakage current
I
LL
–
–
±10
μ
A
1. Typical figures are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. Output drivers will output CMOS logic levels into CMOS loads.
3. Listed pins are for the PLCC package. Refer to
“
Pin Assignments and Signal Descriptions
”
on page 8
for the 44-pin QFP
package.
Table 23. Analog Characteristics
Parameter
Min
Typ
1
Max
Unit
Test Conditions
Recommended output load on TTIP/TRING
50
–
200
AMI output pulse amplitudes
T1
2.4
3.0
3.6
V
R
L
= 100
E1
2.7
3.0
3.3
V
R
L
= 120
Jitter added by the
transmitter
2
10 Hz - 8 kHz
3
–
–
0.02
UI
8 kHz - 40 kHz
3
–
–
0.025
UI
10 Hz - 40 kHz
3
–
–
0.025
UI
Broad Band
–
–
0.05
UI
Receiver sensitivity
0
–
18
dB
@ 1024 kHz
1.431
Allowable consecutive zeros before LOS (T1)
160
175
190
–
Allowable consecutive zeros before LOS (E1)
–
32
–
–
Input jitter tolerance (T1)
10 kHz - 100 kHz
0.4
–
–
UI
0 dB line
AT&T Pub 62411
1 Hz
3
138
–
–
UI
Input jitter tolerance (E1)
10 kHz - 100 kHz
0.2
–
–
UI
0 dB line
ITU (G.823)
1 Hz
3
37
–
–
UI
Jitter attenuation curve corner frequency
4
–
3
–
Hz
selectable in data port
Driver output impedance
–
3
–
Receiver input impedance
–
40
–
k
Receive return loss (E1)
51 kHz - 102 kHz
3
20
22
–
dB
102 kHz - 2.048 MHz
3
20
28
–
dB
2.048 MHz - 3.072 MHz
3
25
30
–
dB
1. Typical figures are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
2. Input signal to TCLK is jitter-free. The Jitter Attenuator is in the receive path or disabled.
3. Guaranteed by characterization; not subject to production testing.
4. Circuit attenuates jitter at 20 dB/decade above the corner frequency.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LXT351PE | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
| LXT351QE | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|QFP|44PIN|PLASTIC |
| LXT360 | 制造商:LVL1 制造商全稱:LVL1 功能描述:Integrated T1/E1 LH/SH Transceivers for DS1/DSX-1/CSU or NTU/ISDN PRI Applications |
| LXT360LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|QFP|44PIN|PLASTIC |
| LXT360PE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC |
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