參數(shù)資料
型號(hào)： M24C64-WMN6T
廠商： 意法半導(dǎo)體
英文描述： 18-Bit Universal Bus Transceiver With 3-State Outputs 56-SSOP -40 to 85
中文描述： 64Kbit和32Kbit串行IC總線的EEPROM
文件頁數(shù)： 12/26頁
文件大?。?/td> 394K
代理商： M24C64-WMN6T
M24C64, M24C32
12/26
Figure 10. Read Mode Sequences
Note: 1. The seven most significant bits of the Device Select Code of a Random Read (in the 1
st
and 4
th
bytes) must be identical.
Read Operations
Read operations are performed independently of
the state of the Write Control (WC) signal.
After the successful completion of a Read opera-
tion, the device’s internal address counter is incre-
mented by one, to point to the next byte address.
Random Address Read
A dummy Write is first performed to load the ad-
dress into this address counter (as shown in
Fig-
ure 10.
) but withoutsending a Stop condition.
Then, the bus master sends another Start condi-
tion, and repeats the Device Select Code, with the
Read/Write bit (RW) set to 1. The device acknowl-
edges this, and outputs the contents of the ad-
dressed byte. The bus master must not
acknowledge the byte, and terminates the transfer
with a Stop condition.
Current Address Read
For the Current Address Read operation, following
a Start condition, the bus master only sends a De-
vice Select Code with the Read/Write bit (RW) set
to 1. The device acknowledges this, and outputs
the byte addressed by the internal address
counter. The counter is then incremented. The bus
master terminates the transfer with a Stop condi-
tion, as shown in
Figure 10.
, withoutacknowledg-
ing the byte.
S
DEV SEL *
BYTE ADDR
BYTE ADDR
S
DEV SEL
DATA OUT 1
AI01105C
DATA OUT N
S
S
CURRENT
ADDRESS
READ
DEV SEL
DATA OUT
RANDOM
ADDRESS
READ
S
S
DEV SEL *
DATA OUT
SEQUENTIAL
CURRENT
READ
S
DATA OUT N
S
DEV SEL *
BYTE ADDR
BYTE ADDR
SEQUENTIAL
RANDOM
READ
S
DEV SEL *
DATA OUT 1
S
ACK
R/W
NO ACK
ACK
R/W
ACK
ACK
ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
ACK
ACK
ACK
R/W
ACK
ACK
R/W
ACK
NO ACK
相關(guān)PDF資料
PDF描述
M24C64-MB3TP 16-Bit Transparent D-Type Latch With 3-State Outputs 54-BGA MICROSTAR JUNIOR -40 to 85
M24C64-MB6 16-Bit Transparent D-Type Latch With 3-State Outputs 48-TSSOP -40 to 85
M24C64-MB6P 16-Bit Transparent D-Type Latch With 3-State Outputs 56-BGA MICROSTAR JUNIOR -40 to 85
M24C64-MB6T 16-Bit Transparent D-Type Latch With 3-State Outputs 54-BGA MICROSTAR JUNIOR -40 to 85
M24C64-MB6TP 16-Bit Transparent D-Type Latch With 3-State Outputs 48-TSSOP -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M24C64WMN6TP 制造商:ST MICRO 功能描述:Pb Free
M24C64-WMN6TP 功能描述:電可擦除可編程只讀存儲(chǔ)器 電可擦除可編程只讀存儲(chǔ)器 S. I2C 64k RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8
M24C64-WMN6TP/P 制造商:STMicroelectronics 功能描述:EEPROM SERL-I2C 64KBIT 8KX8 3.3V/5V 8PIN SO N - Tape and Reel
M24C64-WMN6TP-CUT TAPE 制造商:ST 功能描述:M24C64 Series 64 Kb (8 K x 8) 2.5 V SMT Serial I? Bus EEPROM - SOIC-8
M24D16161DA 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:16-Mbit (1M x 16) Pseudo Static RAM
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