參數(shù)資料
型號: M25P16-VMN6G
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 53/55頁
文件大小: 335K
代理商: M25P16-VMN6G
M25P16
Revision history
53/55
13
Revision history
Table 24.
Document revision history
Date
Revision
Changes
16-Jan-2002
0.1
Target Specification Document written
23-Apr-2002
0.4
Clarification of descriptions of entering Stand-by Power mode from Deep
Power-down mode, and of terminating an instruction sequence or data-
out sequence.
ICC2(max) value changed to 10μA
13-Dec-2002
0.5
Typical Page Program time improved. Write Protect setup and hold times
specified, for applications that switch Write Protect to exit the Hardware
Protection mode immediately before a WRSR, and to enter the Hardware
Protection mode again immediately after
15-May-2003
0.6
MLP8 package added
0.7
50MHz operation, and RDID instruction added. Published internally, only
20-Jun-2003
0.8
8x6 MLP8 and SO16(300 mil) packages added
24-Sep-2003
1.0
t
PP
, t
SE
and t
BE
revised. SO16 package code changed. Output Timing
Reference Voltage changed. Document promoted to Preliminary Data.
24-Nov-2003
2.0
Table of contents, warning about exposed paddle on MLP8, and Pb-free
options added.
Value of t
VSL
(min) and t
BE
(typ) changed. Change of naming for VDFPN8
packages. Document promoted to full Datasheet.
17-May-2004
3.0
MLP8(5x6) package removed. Soldering temperature information
clarified for RoHS compliant devices. Device Grade clarified
01-Apr-2005
4.0
Notes 1 and 2 removed from
Table 23: Ordering information scheme
.
Small text changes.
Read Identification (RDID)
,
Deep Power-down (DP)
and
Release from
Deep Power-down and Read Electronic Signature (RES)
instructions,
and
Active Power, Stand-by Power and Deep Power-Down modes
paragraph clarified.
01-Aug-2005
5.0
Updated Page Program (PP) instructions in
Page programming
,
Page
Program (PP)
and
Table 15: AC characteristics (Grade 6)
.
20-Oct-2005
6.0
VFQFPN8 package added (see
Figure 27: VFQFPN8 (MLP8) 8-lead Very
thin Fine Pitch Quad Flat Package No lead, 6 × 5 mm, package outline
and
Table 18: VFQFPN8 (MLP8) 8-lead Very thin Fine Pitch Quad Flat
Package No lead, 6 × 5 mm, package mechanical data
).
All packages are ECOPACK. “Blank” option removed under
Plating
Technology
.
27-Feb-2006
7
SO8 Narrow and SO8 Wide packages added (see
Section 11: Package
mechanical
). VDFPN8 package updated (see
Table 19: VDFPN8 (MLP8)
8-lead Very thin Dual Flat Package No lead, 8 × 6mm, package
mechanical data
).
Note 1
added to
Table 23: Ordering information
scheme
.
04-Jul-2006
8
Figure 4: Bus master and memory devices on the SPI bus
updated and
Note 2
added. SO8N package specifications updated (see
Figure 29
and
Table 20
). Small text changes.
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