參數(shù)資料
型號: M25P40SVMN6P/4
廠商: NUMONYX
元件分類: PROM
英文描述: 512K X 8 SPI BUS SERIAL EEPROM, PDSO8
封裝: 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8
文件頁數(shù): 13/57頁
文件大?。?/td> 1160K
代理商: M25P40SVMN6P/4
Instructions
M25P40
20/57
6.2
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 8) resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction completion
Page Program (PP) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Figure 8.
Write Disable (WRDI) instruction sequence
C
D
AI03750D
S
Q
2
1
34567
High Impedance
0
Instruction
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