參數(shù)資料
型號: M25P64-VMF6P
廠商: 意法半導體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 14/38頁
文件大?。?/td> 519K
代理商: M25P64-VMF6P
M25P64
14/38
INSTRUCTIONS
All instructions, addresses and data are shifted in
and out of the device, most significant bit first.
Serial Data Input (D) is sampled on the first rising
edge of Serial Clock (C) after Chip Select (S) is
driven Low. Then, the one-byte instruction code
must be shifted in to the device, most significant bit
first, on Serial Data Input (D), each bit being
latched on the rising edges of Serial Clock (C).
The instruction set is listed in
Table 4.
.
Every instruction sequence starts with a one-byte
instruction code. Depending on the instruction,
this might be followed by address bytes, or by data
bytes, or by both or none.
In the case of a Read Data Bytes (READ), Read
Data Bytes at Higher Speed (Fast_Read), Read
Status Register (RDSR), Read Identification
(RDID) or Read Electronic Signature (RES) in-
struction, the shifted-in instruction sequence is fol-
lowed by a data-out sequence. Chip Select (S) can
be driven High after any bit of the data-out se-
quence is being shifted out.
In the case of a Page Program (PP), Sector Erase
(SE), Bulk Erase (BE), Write Status Register
(WRSR), Write Enable (WREN) or Write Disable
(WRDI), Chip Select (S) must be driven High ex-
actly at a byte boundary, otherwise the instruction
is rejected, and is not executed. That is, Chip Se-
lect (S) must driven High when the number of
clock pulses after Chip Select (S) being driven
Low is an exact multiple of eight.
All attempts to access the memory array during a
Write Status Register cycle, Program cycle or
Erase cycle are ignored, and the internal Write
Status Register cycle, Program cycle or Erase cy-
cle continues unaffected.
Table 4. Instruction Set
Instruction
Description
One-byte Instruction Code
Address
Bytes
Dummy
Bytes
Data
Bytes
WREN
Write Enable
0000 0110
06h
0
0
0
WRDI
Write Disable
0000 0100
04h
0
0
0
RDID
Read Identification
1001 1111
9Fh
0
0
1 to 3
RDSR
Read Status Register
0000 0101
05h
0
0
1 to
WRSR
Write Status Register
0000 0001
01h
0
0
1
READ
Read Data Bytes
0000 0011
03h
3
0
1 to
FAST_READ Read Data Bytes at Higher Speed
0000 1011
0Bh
3
1
1 to
PP
Page Program
0000 0010
02h
3
0
1 to 256
SE
Sector Erase
1101 1000
D8h
3
0
0
BE
Bulk Erase
1100 0111
C7h
0
0
0
RES
Read Electronic Signature
1010 1011
ABh
0
3
1 to
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