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參數(shù)資料
| 型號： | M25PE16-VMW6P |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 55/56頁 |
| 文件大小： | 334K |
| 代理商： | M25PE16-VMW6P |
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M25PE16
Revision history
55/56
14
Revision history
Table 24.
Document revision history
Date
Revision
Changes
16-Feb-2006
0.1
Initial release.
07-Aug-2006
1
Figure 3: Bus Master and memory devices on the SPI Bus
updated
and
Note 2
added.
Section 4.8.1: Protocol-related protections
clarified.
Address range for subsector 15 of sector 0 modified in
Table 4:
Memory organization
.
RESET signal behavior clarified in
Section 6.5: Write Status Register
(WRSR)
,
Section 6.9: Page Write (PW)
,
Section 6.10: Page Program
(PP)
,
Section 6.12: Page Erase (PE)
,
Section 6.14: SubSector Erase
(SSE)
,
Section 6.15: Bulk Erase (BE)
.
Section 8: Reset
added to describe the device status after a RESET
Low pulse. Table Reset while a Read, Program or Erase cycle is in
progres replaced by
Table 20: Timings after a RESET Low pulse
Table 19
split into two tables (see also
Table 19
). t
BE
typical value
updated. Small text changes.
13-Oct-2006
2
HPM2 specified in
HPM1 and HPM2
paragraph. Small text changes.
Table 12: Device status after a RESET Low pulse
modified.
V
IO
max. modified in
Table 13: Absolute maximum ratings
.
f
R
, t
W
, t
PW
, t
PP
and t
SSE
modified in
Table 18: AC characteristics
.
20-Nov-2006
3
TSL/W signal renamed as W, Top Sector Lock functionality removed,
HPM2 removed.
Paragraph added in
Section 3: SPI modes
. T
LEAD
added to
Table 13:
Absolute maximum ratings
. t
THSL
and t
SHTL
timings removed from
Table 18: AC characteristics
and
Figure 26: Write Protect setup and
hold timing
. SO8W package specifications updated (see
Table 22
and
Figure 30
).
12-Apr-2007
4
Document status promoted from Preliminary Data to full Datasheet.
V
CC
supply voltage
and
V
SS
ground
added.
Figure 3: Bus Master
and memory devices on the SPI Bus
updated, Note 2 removed and
replaced by an explanatory paragraph.
Behavior of WIP bit and Lock Registers specified at Power-up in
Section 7: Power-up and Power-down
.
VFQFPN8 package specifications updated (see
Figure 29
and
Table 21
).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25PE16-VMW6TG | 功能描述:閃存 16 Mbit Lo Vltg Page Erasable Seral 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M25PE16-VMW6TP | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:16-Mbit, page-erasable serial flash memory with byte-alterability, 75 MHz SPI bus, standard pinout |
| M25PE20 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE20_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 and 2 Mbit, low voltage, Page-Erasable Serial Flash memories with Byte-Alterability, 50 MHz SPI bus, standard pinout |
| M25PE20-V6D11 | 制造商:Micron Technology Inc 功能描述:SERIAL NOR 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Gel-pak, waffle pack, wafer, diced wafer on film |
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