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參數(shù)資料
| 型號： | M25PE80-VMP6G |
| 廠商： | 意法半導體 |
| 元件分類： | FLASH |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 28/43頁 |
| 文件大小： | 599K |
| 代理商： | M25PE80-VMP6G |
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M25PE80
28/43
Deep Power-down (DP)
Executing the Deep Power-down (DP) instruction
is the only way to put the device in the lowest con-
sumption mode (the Deep Power-down mode). It
can also be used as an extra software protection
mechanism, while the device is not in active use,
since in this mode, the device ignores all Write,
Program and Erase instructions.
Driving Chip Select (S) High deselects the device,
and puts the device in the Standby mode (if there
is no internal cycle currently in progress). But this
mode is not the Deep Power-down mode. The
Deep Power-down mode can only be entered by
executing the Deep Power-down (DP) instruction,
subsequently reducing the standby current (from
I
CC1
to I
CC2
, as specified in
Table 15.
).
Once the device has entered the Deep Power-
down mode, all instructions are ignored except the
Release from Deep Power-down (RDP) instruc-
tion. Issuing the Release from Deep Power-down
(RDP) instruction will cause the device to exit the
Deep Power-down mode.
The Deep Power-down mode automatically stops
at Power-down, and the device always Powers-up
in the Standby mode.
The Deep Power-down (DP) instruction is entered
by driving Chip Select (S) Low, followed by the in-
struction code on Serial Data Input (D). Chip Se-
lect (S) must be driven Low for the entire duration
of the sequence.
The instruction sequence is shown in
Figure 21.
.
Chip Select (S) must be driven High after the
eighth bit of the instruction code has been latched
in, otherwise the Deep Power-down (DP) instruc-
tion is not executed. As soon as Chip Select (S) is
driven High, it requires a delay of t
DP
before the
supply current is reduced to I
CC2
and the Deep
Power-down mode is entered.
Any Deep Power-down (DP) instruction, while an
Erase, Program or Write cycle is in progress, is re-
jected without having any effects on the cycle that
is in progress.
Figure 21. Deep Power-down (DP) Instruction Sequence
C
D
AI03753D
S
2
1
3
4
5
6
7
0
t
DP
Deep Power-down Mode
Stand-by Mode
Instruction
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M25PE80-VMP6P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE80-VMP6T | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE80-VMP6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE80-VMP6TP | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE80 | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25PE80-VMP6P | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE80-VMP6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit, Low Voltage, Page-Erasable Serial Flash Memory with Byte-Alterability, 50MHz SPI Bus, Standard Pin-out |
| M25PE80-VMP6TG | 功能描述:閃存 SERIAL PAGE ERASE FLASH 8 Mbit Datas RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M25PE80-VMP6TP | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE80-VMS6G | 制造商:Micron Technology Inc 功能描述:NOR Flash Serial-SPI 3.3V 8Mbit 1M x 8bit 8ns 8-Pin QFN Tray |
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