參數(shù)資料
型號(hào): M2732AF1
廠商: 意法半導(dǎo)體
英文描述: NMOS 32K 4K x 8 UV EPROM
中文描述: NMOS管32K的4K的× 8紫外線存儲(chǔ)器
文件頁數(shù): 2/9頁
文件大小: 93K
代理商: M2732AF1
Q2
VSS
A3
A2
A1
A0
Q0
Q1
GVPP
A10
E
Q7
Q6
Q5
Q4
Q3
A11
A4
VCC
A8
A7
A6
A5
AI00781
M2732A
8
9
10
11
12
1
2
3
4
5
6
7
20
19
18
17
16
15
14
13
A9
23
22
21
24
Figure 2. DIP Pin Connections
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
grade 1
grade 6
0 to 70
–40 to 85
°
C
T
BIAS
Temperature Under Bias
grade 1
grade 6
–10 to 80
–50 to 95
°
C
T
STG
Storage Temperature
–65 to 125
°
C
V
IO
Input or Output Voltages
–0.6 to 6
V
V
CC
Supply Voltage
–0.6 to 6
V
V
PP
Program Supply Voltage
–0.6 to 22
V
Note:
Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause
permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those
indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods
may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.
Table 2. Absolute Maximum Ratings
DEVICE OPERATION
The six modes of operation for the M2732A are
listed in the Operating Modes Table. A single 5V
power supply is required in the read mode. All
inputs are TTL level except for V
PP.
Read Mode
The M2732A has two control functions, both of
which must be logically satisfied in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection.
Assuming that the addresses are stable, address
access time (t
AVAQ
) is equal to the delay from E to
output (t
ELQV
). Data is available at the outputs after
the falling edge of G, assuming that E has been low
and the addresses have been stable for at least
t
AVQV
-t
GLQV
.
Standby Mode
The M2732A has a standby mode which reduces
the active power current by 70 %, from 125 mA to
35 mA. The M2732A is placed in the standby mode
by applying a TTL high signal to E input. When in
standby mode, the outputs are in a high impedance
state, independent of the GV
PP
input.
Two Line Output Control
Because M2732A’s are usually used in larger mem-
ory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
To most efficiently use these two control lines, it is
recommended that E be decoded and used as the
primary device selecting function, while G should
be made a common connection to all devices in the
array and connected to the READ line from the
system control bus.
This ensures that all deselected memory devices
are in their low power standby mode and that the
output pins are only active when data is required
from a particular memory device.
2/9
M2732A
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