參數(shù)資料
型號: M28F101-100XN6
廠商: 意法半導體
英文描述: 1 Mb 128K x 8, Chip Erase FLASH MEMORY
中文描述: 1 MB的128K的× 8,芯片擦除閃存
文件頁數(shù): 8/23頁
文件大?。?/td> 197K
代理商: M28F101-100XN6
Symbol
Alt
Parameter
Test Condition
M28F101
Unit
-120
-150
-200
V
CC
=5V
±
10% V
CC
=5V
±
10% V
CC
=5V
±
10%
EPROM
Interface
EPROM
Interface
EPROM
Interface
Min
Max
Min
Max
Min
Max
t
WHGL
Write Enable High to
Output Enable Low
6
6
6
μ
s
t
AVAV
t
RC
Read Cycle Time
E = V
IL
, G = V
IL
120
150
200
ns
t
AVQV
t
ACC
Address Valid to
Output Valid
E = V
IL
, G = V
IL
120
150
200
ns
t
ELQX(1)
t
LZ
Chip Enable Low to
Output Transition
G = V
IL
0
0
0
ns
t
ELQV
t
CE
Chip Enable Low to
Output Valid
G = V
IL
120
150
200
ns
t
GLQX
(1)
t
OLZ
Output Enable Low to
Output Transition
E = V
IL
0
0
0
ns
t
GLQV
t
OE
Output Enable Low to
Output Valid
E = V
IL
50
55
60
ns
t
EHQZ(1)
Chip Enable High to
Output Hi-Z
G = V
IL
0
55
0
55
0
60
ns
t
GHQZ
(1)
t
DF
Output Enable High to
Output Hi-Z
E = V
IL
0
30
0
35
0
40
ns
t
AXQX
t
OH
Address Transitionto
Output Transition
E = V
IL
, G = V
IL
0
0
0
ns
Note:
1. Sampled only, not 100% tested
Table 9B. Read Only Mode AC Characteristics
((T
A
= 0 to 70
°
C, –40 to 85
°
C or –40 to 125
°
C; 0V
V
PP
6.5V)
Erase and Erase Verify Modes.
The memory is
erased by first Programming all bytes to 00h, the
Erase command then erases them to FFh. The
Erase Verify command is then used to read the
memory byte-by-byte for a content of FFh. The
Erase Mode is set-up by writing 20h to the com-
mand register. The write cycle is then repeated to
start the erase operation. Erasure starts on the
rising edge of W during this second cycle. Eraseis
followed by an Erase Verify which reads an ad-
dressedbyte.
Erase Verify Mode is set-up by writing A0h to the
command registerand at the same time supplying
the address of the byte to be verified. The rising
edgeof Wduringtheset-upof thefirst EraseVerify
Mode stops the Erase operation. The following
read cycle is made with an internally generated
margin voltage applied;readingFFh indicates that
all bits of the addressedbyte are fully erased.The
whole contents of the memory are verified by re-
peatingthe Erase Verify Operation,first writingthe
set-upcode A0h with the addressof the byte to be
verified and then reading the byte contents in a
secondread cycle.
8/23
M28F101
相關PDF資料
PDF描述
M28F101-100XN3 1 Mb 128K x 8, Chip Erase FLASH MEMORY
M28F101-100XK6 1 Mb 128K x 8, Chip Erase FLASH MEMORY
M28F101-100XK3 1 Mb 128K x 8, Chip Erase FLASH MEMORY
M28F101-100P6 1 Mb 128K x 8, Chip Erase FLASH MEMORY
M28F101-100P3 1 Mb 128K x 8, Chip Erase FLASH MEMORY
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