參數(shù)資料
型號(hào): M29F032D70N6T
廠商: 意法半導(dǎo)體
英文描述: JFET-Input Low Power High Drive Quad Operational Amplifier 20-LCCC -55 to 125
中文描述: 32兆位4Mb的× 8,統(tǒng)一座5V電源快閃記憶體
文件頁(yè)數(shù): 5/35頁(yè)
文件大小: 224K
代理商: M29F032D70N6T
5/35
M29F032D
SUMMARY DESCRIPTION
The M29F032D is a 32 Mbit (4Mb x8) non-volatile
memory that can be read, erased and repro-
grammed. These operations can be performed us-
ing a single low voltage 5V supply. On power-up
the memory defaults to its Read mode where it can
be read in the same way as a ROM or EPROM.
The memory is divided into 64 uniform blocks of
64Kbytes (see Figure 5, Block Addresses) that
can be erased independently so it is possible to
preserve valid data while old data is erased.
Blocks can be protected in groups of 4 to prevent
accidental Program or Erase commands from
modifying the memory. Program and Erase com-
mands are written to the Command Interface of
the memory. An on-chip Program/Erase Controller
simplifies the process of programming or erasing
the memory by taking care of all of the special op-
erations that are required to update the memory
contents. The end of a program or erase operation
can be detected and any error conditions identi-
fied. The command set required to control the
memory is consistent with JEDEC standards.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is delivered with all the bits erased (set
to 1).
Figure 2. Logic Diagram
Table 1. Signal Names
AI05258
22
A0-A21
W
DQ0-DQ7
VCC
M29F032D
E
VSS
8
G
RP
RB
A0-A21
Address Inputs
DQ0-DQ7
Data Inputs/Outputs
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
RB
Ready/Busy Output
V
CC
Supply Voltage
V
SS
Ground
NC
Not Connected Internally
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