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參數(shù)資料
| 型號： | M29W004BB55N1T |
| 廠商： | 意法半導體 |
| 英文描述： | 4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| 中文描述： | 4兆位512KB的× 8，啟動塊低壓單電源閃存 |
| 文件頁數(shù)： | 4/30頁 |
| 文件大?。?/td> | 222K |
| 代理商： | M29W004BB55N1T |
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16K BOOT BLOCK
AI02093
7FFFFh
7C000h
7BFFFh
7A000h
79FFFh
40000h
3FFFFh
8K PARAMETER BLOCK
8K PARAMETER BLOCK
32K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
20000h
1FFFFh
10000h
0FFFFh
00000h
M29W004T
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
78000h
77FFFh
70000h
6FFFFh
60000h
5FFFFh
50000h
4FFFFh
M29W004B
16K BOOT BLOCK
8K PARAMETER BLOCK
8K PARAMETER BLOCK
32K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
64K MAIN BLOCK
40000h
3FFFFh
30000h
2FFFFh
20000h
1FFFFh
7FFFFh
70000h
6FFFFh
60000h
5FFFFh
50000h
4FFFFh
10000h
0FFFFh
08000h
07FFFh
04000h
03FFFh
00000h
64K MAIN BLOCK
06000h
05FFFh
64K MAIN BLOCK
30000h
2FFFFh
Figure 3. Memory Map and Block Address Table (x8)
Output Enable (G).
The Output Enable gates the
outputs through the data buffers during a read
operation. When G is High the outputs are High
impedance. G must be forced to V
ID
level during
Block Protection and Unprotection operations.
Write Enable (W).
This input controls writing to the
Command Register and Address and Data latches.
Ready/Busy Output (RB).
Ready/Busy is an
open-drain output and gives the internal state of the
P/E.C. of the device. When RB is Low, the device
is Busy with a Program or Erase operation and it
will not accept any additional program or erase
instructions except the Erase Suspend instruction.
When RB is High, the device is ready for any Read,
Program or Erase operation. The RB will also be
High when the memory is put in Erase Suspend or
Standby modes.
Reset/Block Temporary Unprotect Input (RP).
The RP Input provides hardware reset and pro-
tected block(s) temporary unprotection functions.
Reset of the memory is acheived by pulling RP to
V
IL
for at least t
PLPX
. When the reset pulse is given,
if the memory is in Read or Standby modes, it will
be available for new operations in t
PHEL
after the
rising edge of RP. If the memory is in Erase, Erase
Suspend or Program modes the reset will take
t
PLYH
during which the RB signal will be held at V
IL
.
The end of the memory reset will be indicated by
the rising edge of RB. A hardware reset during an
Erase or Program operation will corrupt the data
being programmed or the sector(s) being erased.
See Table 14 and Figure 9.
Temporary block unprotection is made by holding
RP at V
ID
. In this condition previously protected
blocks can be programmed or erased. The transi-
tion of RP from V
IH
to V
ID
must slower than t
PHPHH
.
When RP is returned from V
ID
to V
IH
all blocks
temporarily unprotected will be again protected.
See Table 15 and Figure 9.
V
CC
Supply Voltage.
The power supply for all
operations (Read, Program and Erase).
V
SS
Ground.
V
SS
is the reference for all voltage
measurements.
4/30
M29W004T, M29W004B
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| M29W008EB90N1E | 8 Mbit (1Mb x 8, Boot Block) 3V Supply Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M29W004BB55N6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| M29W004BB70N1 | 功能描述:閃存 4M (512Kx8) 70ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M29W004BB70N1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| M29W004BB70N6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory |
| M29W004BB90N1 | 功能描述:閃存 4M (512Kx8) 90ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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