參數(shù)資料
型號: M29W800AB80ZA5T
廠商: 意法半導(dǎo)體
英文描述: 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
中文描述: 8兆1兆x8或512KB的x16插槽,引導(dǎo)塊低壓單電源閃存
文件頁數(shù): 4/33頁
文件大?。?/td> 234K
代理商: M29W800AB80ZA5T
M29W800AT, M29W800AB
4/33
Bus Operations
The following operations can be performed using
the appropriate buscycles: Read (Array, Electron-
ic Signature, Block Protection Status), Write com-
mand, Output Disable, Stan-by, Reset, Block
Protection, Unprotection, Protection Verify, Unpro-
tection Verify and Block Temporary Unprotection.
See Tables 5 and 6.
Command Interface
Instructions, made up of commands written in cy-
cles, can be given to the Program/Erase Controller
through a Command Interface (C.I.). For added
data protection, program or erase execution starts
after 4 or 6 cycles. The first, second, fourth and
fifth cycles are used to input Coded cycles to the
C.I. This Coded sequence is the same for all Pro-
gram/Erase Controller instructions. The ’Com-
mand’ itself and its confirmation, when applicable,
are given on the third, fourth or sixth cycles. Any
incorrect commandor any improper command se-
quence will reset the device to Read Array mode.
Instructions
Seven instructions are defined to perform Read
Array, Auto Select (to read the Electronic Signa-
ture or Block Protection Status), Program, Block
Erase, Chip Erase, Erase Suspend and Erase Re-
sume.
The internal P/E.C. automatically handles all tim-
ing and verification of the Program and Erase op-
erations. The
Status Register Data
Toggle, Error bits and the RB output may be read
at any time, during programming or erase, to mon-
itor the progress of the operation.
Instructions are composed of up to six cycles. The
first two cycles input a Coded sequence to the
Command Interface which is common to all in-
structions (see Table 9).
The third cycle inputs the instruction set-up com-
mand. Subsequent cycles output the addressed
data, Electronic Signature or Block Protection Sta-
tus for Read operations. Inorder to give additional
data protection, the instructions for Program and
Block or Chip Erase require further command in-
puts. For a Program instruction, the fourth com-
mand cycle inputs the address and data to be
programmed. For an Erase instruction (Block or
Chip), the fourth and fifth cycles input a further
Coded sequence before the Erase confirm com-
mand on the sixth cycle. Erasure of a memory
block may be suspended, in order to read data
from another block or to program data in another
block, and then resumed. When power is first ap-
plied or if V
CC
falls below V
LKO
, the command in-
terface is reset to Read Array.
Polling,
Table 2. Absolute Maximum Ratings
(1)
Note: 1. Except for the rating ”O(jiān)perating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions forextended periods may affect device reliability. Referalso to theSTMicroelectronics SURE Program and other relevantqual-
ity documents.
2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns during transitions.
3. Depends on range.
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
(3)
–40 to 85
°
C
T
BIAS
Temperature Under Bias
–50 to 125
°
C
T
STG
Storage Temperature
–65 to 150
°
C
V
IO(2)
Input or Output Voltage
–0.6 to 5
V
V
CC
Supply Voltage
–0.6 to 5
V
V
(A9, E, G, RP)(2)
A9, E, G, RP Voltage
–0.6 to 13.5
V
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