參數(shù)資料
型號(hào): M29W800AT100ZA1T
廠商: 意法半導(dǎo)體
英文描述: Low-Power Single Schmitt-Trigger Buffer 5-SOT -40 to 85
中文描述: 8兆1兆x8或512KB的x16插槽,引導(dǎo)塊低壓?jiǎn)坞娫撮W存
文件頁數(shù): 27/33頁
文件大小: 234K
代理商: M29W800AT100ZA1T
27/33
M29W800AT, M29W800AB
Table 24. Security Block Instruction
Note: 1. Address bits A10-A19 are don’t care for coded address inputs.
2. Data bits DQ8-DQ15 are don’t care for coded address inputs.
Mne.
Instr.
Cyc.
Unlock Cycle
2nd Cyc.
1st Cyc.
RDS
Read
Security
Data
1
Addr.
(1)
AAh
Read OTP Data until a new write cycle is initiated.
Data
(2)
B8h
Figure 15. Security Block Address Table
Security
Memory Block
AI02746
TOP BOOT BLOCK
000FFh
Security
Memory Block
00000h
0E0FFh
0E000h
BOTTOM BOOT BLOCK
Security
Memory Block
TOP BOOT BLOCK
0007Fh
Security
Memory Block
00000h
0E01Fh
0E000h
BOTTOM BOOT BLOCK
BYTE Organisation (x8)
WORD Organisation (x16)
SECURITY PROTECTION MEMORY AREA
The M29W800A features a security protection
memory area. It consists of amemory block of 256
bytes or128 words whichis programmedin the ST
factory to store a unique code that uniquely identi-
fies the part.
This memory block can beread by using the Read
Security Data instruction (RDS) as shown in Table
24.
Read Security Data (RDS) Instruction.
This RDS
uses a single write cycle instruction: the command
B8h is written to the address AAh. This sets the
memory to the Read Security mode. Any succes-
sive read attempt will output the addressed Secu-
rity byte until a new write cycle is initiated.
相關(guān)PDF資料
PDF描述
M29W800AT100N6T Low-Power Single Schmitt-Trigger Buffer 5-SC70 -40 to 85
M29W800AB100ZA6T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
M29W800AB100ZA1T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
M29W800AB100N6T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
M29W800AB100N5T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
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