參數(shù)資料
型號(hào): M29W800AT100ZA6T
廠商: 意法半導(dǎo)體
英文描述: Low-Power Single Schmitt-Trigger Buffer 5-SOT -40 to 85
中文描述: 8兆1兆x8或512KB的x16插槽,引導(dǎo)塊低壓?jiǎn)坞娫撮W存
文件頁(yè)數(shù): 19/33頁(yè)
文件大?。?/td> 234K
代理商: M29W800AT100ZA6T
19/33
M29W800AT, M29W800AB
Figure 8. Write AC Waveforms, W Controlled
Note: Address are latched on the falling edge of W, Data is latched on the rising edge of W.
AI02183
E
G
W
A0-A18/
A–1
DQ0-DQ7/
DQ8-DQ15
VALID
VALID
VCC
tVCHEL
tWHEH
tWHWL
tELWL
tAVWL
tWHGL
tWLAX
tWHDX
tAVAV
tDVWH
tWLWH
tGHWL
RB
tWHRL
Erase Suspend (ES) Instruction.
The
Erase operation may be suspended by this in-
struction which consists of writing the command
B0h without any specific address. No Coded cy-
cles are required. It permits reading of data from
another block and programming in another block
while an eraseoperation is in progress.Erase sus-
pend is accepted only during the Block Erase in-
struction execution. Writing this command during
Erase timeout will, in addition to suspending the
erase, terminate the timeout. The Toggle bit DQ6
stops toggling when the P/E.C. is suspended. The
Toggle bits will stop toggling between 0.1
μ
s and
15
μ
s after the Erase Suspend (ES) command has
been written. The device will then automatically be
set to Read Memory Array mode. When erase is
Block
suspended, a Read from blocks being erased will
output DQ2 toggling and DQ6 at ’1’.A Read from
a block not being erased returns valid data. During
suspension the memory will respond only to the
Erase Resume ER and the Program PG instruc-
tions. A Program operation can be initiated during
erase suspend in one of the blocks not being
erased. It will result inboth DQ2 and DQ6 toggling
when the data is being programmed. A Read/Re-
set command willdefinitively abort erasure and re-
sult in invalid data in the blocks being erased.
Erase Resume (ER) Instruction.
If
Suspend instruction was previously executed, the
erase operation may be resumed by giving the
command 30h, at any address, and without any
Coded cycles.
an
Erase
相關(guān)PDF資料
PDF描述
M29W800AT100ZA1T Low-Power Single Schmitt-Trigger Buffer 5-SOT -40 to 85
M29W800AT100N6T Low-Power Single Schmitt-Trigger Buffer 5-SC70 -40 to 85
M29W800AB100ZA6T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
M29W800AB100ZA1T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
M29W800AB100N6T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
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