參數(shù)資料
型號(hào): M29W800AT100ZA6T
廠商: 意法半導(dǎo)體
英文描述: Low-Power Single Schmitt-Trigger Buffer 5-SOT -40 to 85
中文描述: 8兆1兆x8或512KB的x16插槽,引導(dǎo)塊低壓?jiǎn)坞娫撮W存
文件頁(yè)數(shù): 2/33頁(yè)
文件大小: 234K
代理商: M29W800AT100ZA6T
M29W800AT, M29W800AB
2/33
Figure 2. TSOP Connections
DQ3
DQ10
DQ9
DQ1
DQ2
A6
A5
DQ0
G
VSS
W
RP
A3
A2
A1
RB
A18
DQ6
DQ13
DQ5
A8
NC
A9
A17
A7
A10
DQ14
DQ12
DQ4
DQ15A–1
DQ7
VCC
DQ11
NC
NC
AI02179
M29W800T
M29W800B
12
13
1
24
25
36
37
48
DQ8
NC
A4
A12
A11
A13
A16
BYTE
VSS
A15
A14
E
A0
Figure 3. SO Connections
G
DQ0
DQ8
DQ1
DQ9
A3
A2
A1
A0
E
VSS
A13
A14
A15
A16
BYTE
VSS
DQ15A–1
DQ7
DQ14
DQ6
DQ13
A12
DQ5
DQ12
DQ2
DQ10
DQ3
DQ11
VCC
DQ4
A9
A10
W
A8
RB
A18
A4
RP
A7
A6
A5
AI02181
M29W800
T
M29W800B
8
9
10
11
12
13
14
15
16
17
2
3
4
5
6
7
32
31
30
29
28
27
26
25
24
23
22
20
21
19
18
44
43
42
41
39
38
37
36
35
34
33
A11
40
1
A17
Table 1. Signal Names
A0-A18
Address Inputs
DQ0-DQ7
Data Input/Outputs, Command Inputs
DQ8-DQ14
Data Input/Outputs
DQ15A–1
Data Input/Output or Address Input
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
RB
Ready/Busy Output
BYTE
Byte/Word Organization
V
CC
Supply Voltage
V
SS
Ground
NC
Not Connected Internally
DU
Don’t Use as Internally Connected
DESCRIPTION
TheM29W800A isa non-volatilememory that may
be erasedelectrically at the block or chip level and
programmed in-system on a Byte-by-Byte or
Word-by-Word basis using only a single 2.7V to
3.6V V
CC
supply. For Program and Erase opera-
tions the necessary high voltages are generated
internally. The device can also be programmed in
standard programmers.
The array matrix organisation allows each block to
be erased and reprogrammed without affecting
other blocks. Blocks canbe protected against pro-
graming and erase on programming equipment,
and temporarily unprotected to make changes in
the application. Each block can be programmed
and erased over 100,000 cycles.
Instructions for Read/Reset, Auto Select for read-
ing the Electronic Signature or Block Protection
status, Programming, Block and Chip Erase,
Erase Suspend and Resume are written to the de-
vice in cycles of commands to a Command Inter-
face using standard microprocessor write timings.
The device is offered in TSOP48 (12 x 20mm),
SO44 and LFBGA48 0.8 mm ball pitch packages.
相關(guān)PDF資料
PDF描述
M29W800AT100ZA1T Low-Power Single Schmitt-Trigger Buffer 5-SOT -40 to 85
M29W800AT100N6T Low-Power Single Schmitt-Trigger Buffer 5-SC70 -40 to 85
M29W800AB100ZA6T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
M29W800AB100ZA1T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
M29W800AB100N6T 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
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