參數(shù)資料
型號(hào)： M29W800AT80ZA5T
廠商： 意法半導(dǎo)體
英文描述： 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Low Voltage Single Supply Flash Memory
中文描述： 8兆1兆x8或512KB的x16插槽，引導(dǎo)塊低壓?jiǎn)坞娫撮W存
文件頁(yè)數(shù)： 7/33頁(yè)
文件大?。?/td> 234K
代理商： M29W800AT80ZA5T
7/33
M29W800AT, M29W800AB
DEVICE OPERATIONS
See Tables 5, 6 and 7.
Read.
Read operations are used to output the
contents of the Memory Array, the Electronic Sig-
nature, the Status Register orthe BlockProtection
Status. Both Chip Enable E and Output Enable G
must below in order to read theoutput ofthe mem-
ory. A new operation is initiated either on the fol-
lowing edge of Chip Enable E or on any address
transition with E at V
IL
.
Write.
Write operations are used to give Instruc-
tion Commands to the memory or to latch input
data to be programmed. A write operation is initi-
ated when Chip Enable E isLow and Write Enable
W is Low with Output Enable G High. Addresses
are latchedonthe falling edgeof W orEwhichever
occurs last. Commands and Input Data are
latched onthe rising edge of W or E whichever oc-
curs first.
Output Disable.
The data outputs are high im-
pedance when the Output Enable G is High with
Write Enable W High.
Stan-by.
The memory is in stan-by when Chip
Enable E is High and the P/E.C. is idle. The power
consumption is reduced to the stan-by level and
the outputs are high impedance, independent of
the OutputEnable G or Write Enable W inputs.
Automatic Stan-by.
After 150ns of bus inactivity
(no address transition, CE= V
IL
) and when CMOS
levels aredriving the addresses, the chip automat-
ically enters a pseudo-stan-by mode where con-
sumption is reduced to the CMOS stan-by value,
while outputs still drive the bus (if G = V
IL
).
Electronic Signature.
Two codes identifying the
manufacturer and the device can be read from the
memory. The manufacturer’s code for STMicro-
electronics is 20h, the device code is D7h for the
M29W800AT
(Top
Boot)
M29W800AB (Bottom Boot). These codes allow
programming equipment or applications to auto-
matically match their interface to the characteris-
tics ofthe M29W800A. The Electronic Signature is
output by a Read operation when the voltage ap-
plied to A9 is at V
ID
and address inputs A1 is Low.
The manufacturer code is output when the Ad-
dress input A0 is Low and the device code when
this input is High. Other Address inputs are ig-
nored. The codes are output on DQ0-DQ7.
and
5Bh
for
the
The Electronic Signature canalso beread, without
raising A9 to V
ID
, by giving the memory the In-
struction AS. If the Byte-wide configuration is se-
lected the codes are output on DQ0-DQ7 with
DQ8-DQ14 at High impedance; if the Word-wide
configuration is selected the codes are output on
DQ0-DQ7 with DQ8-DQ15 at 00h.
Block Protection.
Each block can be separately
protected against Program or Erase on program-
ming equipment. Block protection provides addi-
tional data security, as it disables all program or
erase operations. This mode is activated when
both A9 and G are raised to V
ID
and anaddress in
the block is applied on A12-A18. Block protection
is initiated on the edge of W falling to V
IL
. Then af-
ter a delay of 100
μ
s, the edge of W rising to V
IH
ends the protection operations. Block protection
verify is achieved by bringing G, E, A0 and A6 to
V
IL
and A1 to V
IH
, while W is at V
IH
and A9 at V
ID
.
Under these conditions, reading the data output
will yield 01h if the block defined by the inputs on
A12-A18 is protected. Any attempt to program or
erase a protected block will be ignored by the de-
vice.
Block Temporary Unprotection.
Any previously
protected block can be temporarily unprotected in
order to change stored data. The temporary un-
protection mode is activated by bringing RP to V
ID
.
During the temporary unprotection mode the pre-
viously protected blocks are unprotected. A block
can be selected and data can be modified by exe-
cuting the Erase or Program instruction with the
RP signal held at V
ID
. When RP is returned to V
IH
,
all the previously protected blocks are again pro-
tected.
Block Unprotection.
All protected blocks can be
unprotected on programming equipment to allow
updating of bit contents. All blocks must first be
protected before theunprotection operation. Block
unprotection is activated when A9, G and E are at
V
ID
and A12, A15 at V
IH
. Unprotection is initiated
by the edge of W falling to V
IL
. After a delay of
10ms, the unprotection operation will end. Unpro-
tection verify is achieved by bringing G and E to
V
IL
while A0 is at V
IL
, A6 and A1 are at V
IH
and A9
remains at V
ID
. In these conditions, reading the
output data willyield 00h if theblock defined by the
inputs A12-A18 has been successfully unprotect-
ed. Each block must be separately verified by giv-
ing its address in order to ensure that it has been
unprotected.
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