102
Serial I/O2
M
i
t
s
u
M
S
b
i
s
3
M
h
0
I
C
i
m
2
R
i
1
O
c
r
8
C
o
c
o
G
M
m
p
r
P
u
t
u
T
e
r
p
R
s
o
U
S
I
N
G
L
E
-
C
H
I
P
1
6
-
B
I
T
C
M
O
O
E
Serial I/O2
Serial I/O2 is used as the clock synchronous serial I/O and has an ordinary mode and an automatic transfer
mode. In the automatic transfer mode, serial transfer is performed through the serial I/O automatic transfer
RAM which has up to 256 bytes (addresses 00400
16
to 004FF
16
).
The S
RDY2
, S
BUSY2
and S
STB2
pins each have a handshake I/O signal function and can select either “H”
active or “L” active for active logic.
Specification
8-bit serial I/O mode (non-automatic transfer)
Automatic transfer serial I/O mode
Transfer data length: 8 bits
Full duplex mode / transmit-only mode selected by bit 5 at address 0342
16
When internal clock is selected (bit 2 at address 0342
16
= “0”) : selected by bits 5 to 7 at address 0348
16
When external clock is selected (bit 2 at address 034216 = “1”) : Input from S
CLK21
pin, S
CLK22
pin(Note 2)
When internal clock is selected : f(X
IN
)/4, f(X
IN
)/8, f(X
IN
)/16, f(X
IN
)/32, f(X
IN
)/64, f(X
IN
)/128, f(X
IN
)/256
When external clock is selected : input cycle 0.95
μ
s or less
S
STB2
output / S
BUSY2
input or output / S
RDY2
input or output chosen
To start transmission / reception, the following requirements must be met:
_
Serial I/O initialization bit (bit 4 at address 0342
16
) = “1”
_
When S
input, or S
input is selected : selected input level = “H”
____________
_________
_
When S
BUSY2
input, or S
RDY2
input is selected : selected input level = “L”
Furthermore, if external clock is selected, the following requirements must
also be met:
_
Input level of S
CLK21
or S
CLK22
= “H”
To stop transmission and reception, set serial I/O initialization bit (bit 4 at
address 0342
16
) to “0” regardless internal clock and external clock.
8-bit serial I/O mode : Interrupts requested when 8-bit data transfer is com-
pleted
Automatic transfer serial I/O mode :Interrupts requested when last receive
data transfer to Automatic transfer RAM
S
OUT2
P-channel output disable function
CMOS output or N-channel open-drain output can be selected
LSB first/MSB first selection
Whether transmission/reception begins with bit 0 or bit 7 can be selected
Serial I/O2 clock pin select bit
Serial clock input/output can be selected; S
CLK21
or S
CLK22
S
BUSY
output, S
STB2
output select function (only automatic transfer serial
mode)
S
BUSY
output, S
STB2
output can be selected; 1-byte data transfer unit or all
data transfer unit
S
OUT2
pin control bit
Either output active or high-impedance can be selected as a S
OUT2
pin state at
serial non-transfer .
Note 1: It is necessary to set the serial I/O clock pin select bit ( bit 7 at address 0342
16
)
Item
Serial mode
Transfer data format
Transfer clock
Transfer rate
Transmission/reception control
Transmission /
reception start condition
Transmission and
reception stop condition
Interrupt request
generation timing
Select function
Table 28. Specifications of clock synchronous serial I/O2