62
FLD controller
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Data setup
(1) 16-timingOrdinary Mode
The area of addresses 0570
16
to 05DF
16
are used as a FLD automatic display RAM.
When data is stored in the FLD automatic display RAM, the last data of FLD port P4 is stored at address 0570
16
, the
last data of FLD port P3 is stored at address 0580
16
, the last data of FLD port P2 is stored at address 0590
16
, the last
data of FLD port P1 is stored at address 05A0
16
, the last data of FLD port P0 is stored at address 05B0
16
,
the last data of FLD port P5 is stored at address 05C0
16
,
and the last data of FLD port P6 is stored at address 05D0
16
,
to
assign in sequence from the last data respectively.
The first data of the FLD port P4, P3, P2, P1, P0, P5, and P6 is stored at an address which adds the value of (the
timing number – 1) to the corresponding address
0570
16
, 0580
16
, 0590
16
, 05A0
16
, 05B0
16
, 05C0
16
and 05DF
16
.
Set the FLD data pointer reload register to the value given by the number of digits – 1.
(2) 16-timingGradation Display Mode
Display data setting is performed in the same way as that of the 16-timingordinary mode. Gradation display control
data is arranged at an address resulting from subtracting 0070
16
from the display data store address of each timing
and pin. Bright display is performed by setting “0”, and dark display is performed by setting “1” .
(3) 32-timing Mode
The area of addresses 0500
16
to 05DF
16
are used as a FLD automatic display RAM.
When data is stored in the FLD automatic display RAM, the last data of FLD port P4 is stored at address 0500
16
, the
last data of FLD port P3 is stored at address 0520
16
, the last data of FLD port P2 is stored at address 0540
16
,
the last data of FLD port P1 is stored at address 0560
16
, the last data of FLD port P0 is stored at address 0580
16
, the
last data of FLD port P5 is stored at address 05A0
16
,
and the last data of FLD port P6 is stored at address 05C0
16
,
to
assign in sequence from the last data respectively
.
The first data of the FLD port P4, P3, P2, P0, P1, P5, and P6 is stored at an address which adds the value of (the
timing number – 1) to the corresponding address
0500
16
, 0520
16
, 0540
16
, 0560
16
, 0580
16
, 05A0
16
and 05C0
16
.
Set the FLD data pointer reload register to the value given by the number of digits - 1.
Figure 45. Example of Using the FLD Automatic
Display RAM in 16-timingOrdinary Mode
Number of timing: 8
Address
0570
16
058F
16
0590
16
0591
16
0592
16
0593
16
0594
16
0595
16
0596
16
0597
16
0598
16
0599
16
059A
16
059B
16
059C
16
059D
16
059E
16
059F
16
05A0
16
0571
16
0572
16
0573
16
0574
16
0575
16
0576
16
0577
16
0578
16
0579
16
057A
16
057B
16
057C
16
057D
16
057E
16
057F
16
0580
16
0581
16
0582
16
0583
16
0584
16
0585
16
0586
16
0587
16
0588
16
0589
16
058A
16
058B
16
058C
16
058D
16
058E
16
05A1
16
05A2
16
05A3
16
05A4
16
05A5
16
05A6
16
05A7
16
05A8
16
05A9
16
05AA
16
05AB
16
05AC
16
05AD
16
05AE
16
05AF
16
The last timing
(The last data of FLDP4)
Timing for start
(The first data of FLDP4)
(The The last timing
Timing for start
(The first data of FLDP3)
The last timing
(The last data of FLDP2)
Timing for start
(The first data of FLDP2)
The last timing
(The last data of FLDP1)
Timing for start
(The first data of FLDP1)
7
6
5
4
3
2
1
0
Bit
Address
05B0
16
05B1
16
05B2
16
05B3
16
05B4
16
05B5
16
05B6
16
05B7
16
05B8
16
05B9
16
05BA
16
05BB
16
05BC
16
05BD
16
05BE
16
05BF
16
05C0
16
The last timing
(The last data of FLDP0)
FLDP0 data area
Timing for start
(The first data of FLDP0)
7
6
5
4
3
2
1
0
Bit
05C1
16
05C2
16
05C3
16
05C4
16
05C5
16
05C6
16
05C7
16
05C8
16
05C9
16
05CA
16
05CB
16
05CC
16
05CD
16
05CE
16
05CF
16
05D0
16
05D1
16
05D2
16
05D3
16
05D4
16
05D5
16
05D6
16
05D7
16
05D8
16
05D9
16
05DA
16
05DB
16
05DC
16
05DD
16
05DE
16
05DF
16
The last timing
(The last data of FLDP5)
FLDP5 data area
Timing for start
(The first data of FLDP5)
The last timing
(The last data of FLDP6)
FLDP6 data area
Timing for start
(The first data of FLDP6)
FLDP1 data area
FLDP2 data area
FLDP4 data area
FLDP3 data area