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| 型號(hào)： | M30220 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 185/212頁(yè) |
| 文件大小： | 2891K |
| 代理商： | M30220 |
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Appendix Standard Serial I/O Mode (Flash Memory Version)
Unde
deeopmen
Preliminary Specifications REV.E
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30220 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
185
Standard serial I/O mode
The standard serial I/O mode inputs and outputs the software commands, addresses and data needed to
operate (read, program, erase, etc.) the internal flash memory. This I/O is serial. There are actually two
standard serial I/O modes: mode 1, which is clock synchronized, and mode 2, which is asynchronized. Both
modes require a purpose-specific peripheral unit.
The standard serial I/O mode is different from the parallel I/O mode in that the CPU controls flash memory
rewrite (uses the CPU's rewrite mode), rewrite data input and so forth. The standard serial I/O mode is
started by connecting “H” to the P7
4
(CE) pin and “H” to the CNV
SS
pin (when V
CC
= 4.5 V to 5.5 V, connect
to V
CC
; when V
CC
= 2.7 V to 4.5 V, supply 4.5 V to 5.5 V to Vpp from an external source), and releasing the
reset operation. (In the ordinary command mode, set CNVss pin to "L" level.)
This control program is written in the boot ROM area when the product is shipped from Mitsubishi. Accord-
ingly, make note of the fact that the standard serial I/O mode cannot be used if the boot ROM area is
rewritten in the parallel I/O mode. Figure 1.25.1 shows the pin connections for the standard serial I/O mode.
Serial data I/O uses UART0 and transfers the data serially in 8-bit units. Standard serial I/O switches
between mode 1 (clock synchronized) and mode 2 (clock asynchronized) according to the level of CLK
0
pin
when the reset is released.
To use standard serial I/O mode 1 (clock synchronized), set the CLK
0
pin to "H" level and release the reset.
The operation uses the four UART0 pins CLK
0
, RxD
0
, TxD
0
and RTS
0
(BUSY). The CLK
0
pin is the transfer
clock input pin through which an external transfer clock is input. The TxD
0
pin is for CMOS output. The
RTS
0
(BUSY) pin outputs an "L" level when ready for reception and an "H" level when reception starts.
To use standard serial I/O mode 2 (clock asynchronized), set the CLK
0
pin to "L" level and release the
reset. The operation uses the two UART0 pins RxD
0
and TxD
0
.
In the standard serial I/O mode, only the user ROM area indicated in Figure 1.22.1 can be rewritten. The
boot ROM cannot.
In the standard serial I/O mode, a 7-byte ID code is used. When there is data in the flash memory, com-
mands sent from the peripheral unit (programmer) are not accepted unless the ID code matches.
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