Serial I/O
deeopmen
Preliminary Specifications REV.E
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30220 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
92
UARTi transmit/receive mode register
Symbol
UiMR(i=0,1)
Address
03A0
16
, 03A8
16
When reset
00
16
b7
b6
b5
b4
b3
b2
b1
b0
Bit name
Bit
symbol
W
A
R
Must be fixed to 001
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
CKDIR
SMD1
SMD0
Serial I/O mode select bit
SMD2
Internal/external clock
select bit
STPS
PRY
PRYE
SLEP
Parity enable bit
0 : Internal clock
1 : External clock (Note)
Stop bit length select bit
Odd/even parity select bit
Sleep select bit
0 : One stop bit
1 : Two stop bits
0 : Parity disabled
1 : Parity enabled
0 : Sleep mode deselected
1 : Sleep mode selected
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
b2 b1 b0
0 : Internal clock
1 : External clock (Note)
Invalid
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
Invalid
Invalid
Must always be “0”
Function
(During UART mode)
Function
(During clock synchronous
serial I/O mode)
UART2 transmit/receive mode register
Symbol
U2MR
Address
0378
16
When reset
00
16
b7
b6
b5
b4
b3
b2
b1
b0
Bit name
Bit
symbol
W
A
R
Must be fixed to 001
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 0 : (Note 1)
0 1 1 : Inhibited
1 1 1 : Inhibited
CKDIR
SMD1
SMD0
Serial I/O mode select bit
SMD2
Internal/external clock
select bit
STPS
PRY
PRYE
IOPOL
Parity enable bit
0 : Internal clock
1 : External clock (Note 2)
Stop bit length select bit
Odd/even parity select bit
TxD, RxD I/O polarity
reverse bit
0 : One stop bit
1 : Two stop bits
0 : Parity disabled
1 : Parity enabled
0 : No reverse
1 : Reverse
Usually set to “0”
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
b2 b1 b0
Invalid
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
Invalid
Invalid
0 : No reverse
1 : Reverse
Usually set to “0”
Function
(During UART mode)
Function
(During clock synchronous
serial I/O mode)
A
AA
AA
AA
AA
AA
A
A
A
A
A
A
A
A
A
AA
AA
AA
AA
AA
A
A
A
A
AA
A
A
Note 1: Bit 2 to bit 0 are set to “010
2
” when I
2
C mode is used.
Note 2: Set the corresponding port direction register to “0”.
Must always be fixed to “0”
Note : Set the corresponding port direction register to “0”.
Figure 1.15.5. Serial I/O-related registers (2)