參數(shù)資料
型號(hào): M30290MAV-XXXHP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝: 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù): 32/32頁(yè)
文件大?。?/td> 218K
代理商: M30290MAV-XXXHP
M16C/29 Group
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
1. Overview
Rev.0.30 2004.06.15
page 9 of 30
REJ03B0072-0030Z
P1
5/INT
3/AD
TRG
/IDV
P1
6/INT
4/IDW
P64/RTS1/CTS1/CTS0/CLKS1
/RTS1/CTS1/CTS0/CLKS1
P73/CTS2/RTS2/TA1IN/V/TxD1
P8
1/T
A4
IN
/U
P8
5/NMI/SD
P75/TA2IN/W
1
2
3
4
5
6
7
8
9
10
11
12
P9
5/AN
25
/CLK
4
13
14
15
16
17
18
19
20
CNV
SS
RESET
X
OUT
V
SS
X
IN
V
CC
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
AVCC
VREF
AVSS
P8
4/INT
2/ZP
P9
3/AN
24
/CTX
P9
2/AN
32
/TB2
IN
/CRX
P9
1/AN
31
/TB1
IN
P9
0/AN
30
/TB0
IN
/CLK
OUT
P8
7
/X
CIN
P8
6/X
COUT
P8
3/INT
1
P8
2/INT
0
P8
0/T
A4
OUT
/U
P7
7/T
A3
IN
P76/TA3OUT
P74/TA2OUT/W
P72/CLK2/TA1OUT/V/RxD1
P71/RxD2/SCL/TA0IN/CLK1
P67/TxD1
P66/RxD1
P65/CLK1
P37
P36
P35
P34
P33
P32/SOUT3
P31/SIN3
P30/CLK3
P63/TxD0
P6
2/RxD
0
P6
1/CLK
0
P6
0/R
TS
0/CTS
0
P2
7/OUTC1
7/INPC1
7
P2
6/OUTC1
6/INPC1
6
P2
5/OUTC1
5/INPC1
5
P2
4/OUTC1
4/INPC1
4
P2
3/OUTC1
3/INPC1
3
P2
2/OUTC1
2/INOC1
2
P2
1/OUTC1
1/INPC1
1/SCLMM
P2
0/OUTC1
0/INPC1
0/SDAMM
P1
7/INT
5/INPC1
7/IDU
P1
4
P1
3/AN
23
P1
2/AN
22
P1
1/AN
21
P1
0/AN
20
P0
7/AN
07
P06/AN06
P05/AN05
P04/AN04
P03/AN03
P02/AN02
P01/AN01
P00/AN00
P103/AN3
P102/AN2
P101/AN1
P100/AN0
P97/AN27/SIN4
P96/AN26/SOUT4
P107/AN7/KI3
P104/AN4/KI0
P105/AN5/KI1
P106/AN6/KI2
{P70/TxD2/SDA/TA0OUT
Note. Set PACR2 to PACR0 bit in the PACR register
to "011b" before you input and output it after
resetting to each pin. When the PACR register
isn’t set up, the input and output function of
some of the pins are disabled.
Package: 80P6Q-A
Figure 1.5.1. Pin Configuration (Top View) of M16C/29 Group, 80-pin Package
PIN CONFIGURATION (top view)(Note)
1.5 Pin Configuration
Figures 1.5.1 and 1.5.2 show the pin configurations (top view).
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