參數(shù)資料
型號(hào): M30600E8GP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù): 79/139頁(yè)
文件大?。?/td> 1782K
代理商: M30600E8GP
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Mitsubishi microcomputers
M16C / 60 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
44
______
NMI Interrupt
______
An NMI interrupt is generated when the input to the P85/NMI pin changes from “H” to “L”. The NMI interrupt
is a non-maskable external interrupt. The pin level can be checked in the port P85 register (bit 5 at address
03F016).
This pin cannot be used as a normal port input.
Notes:
(1)
______
When not intending to use the NMI function, be sure to connect the NMI pin to VCC. Because the NMI
interrupt is non-maskable, it cannot be disabled.
(2)
______
When the NMI pin input is “L”, do not set the microcomputer in stop mode or wait mode. The NMI
interrupt is triggered by the falling edge, so the “L” level does not need to be maintained longer than
necessary.
Key Input Interrupt
If the direction register of any of P104 to P107 is set for input and a falling edge is input to that port, a key
input interrupt is generated. A key input interrupt can also be used as a key-on wakeup function for cancel-
ling the wait mode or stop mode. However, if you intend to use the key input interrupt, do not use P104 to
P107 as A-D input ports. Figure 1.28 shows a block diagram of the key input interrupt. Note that if an “L”
level is input to any pin that has not been disabled for input, inputs to the other pins are not detected as an
interrupt.
Interrupt control circuit
Key input interrupt control register
(address 004D16)
Key input interrupt
request
P107/KI3
P106/KI2
P105/KI1
P104/KI0
Port P104-P107 pull-up
select bit
Port P107 direction
register
Pull-up
transistor
Port P107 direction register
Port P106 direction
register
Port P105 direction
register
Port P104 direction
register
Pull-up
transistor
Pull-up
transistor
Pull-up
transistor
Figure 1.28. Block diagram of key input interrupt
______
NMI Interrupts
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