參數(shù)資料
型號(hào): M30622SAGP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機(jī)
文件頁(yè)數(shù): 100/276頁(yè)
文件大小: 3567K
代理商: M30622SAGP
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Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timers’ functions for three-phase motor control
100
Timers
functions for three-phase motor control
Use of more than one built-in timer A and timer B provides the means of outputting three-phase motor
driving waveforms.
Figures 1.18.1 to 1.18.3 show registers related to timers for three-phase motor control.
Three-phase PWM control register 0
Symbol
INVC0
Address
0348
16
When reset
00
16
b7
b6
b5
b4 b3
b2
b1
b0
Effective interrupt output
polarity select bit
(Note4)
INV00
Bit symbol
Bit name
Description
R
W
INV01
Effective interrupt output
specification bit
(Note4)
INV02
Mode select bit
(Note 2)
INV04
Positive and negative
phases concurrent L
output disable function
enable bit
INV07
Software trigger bit
INV06
Modulation mode select
bit (Note 3)
INV05
Positive and negative
phases concurrent L
output detect flag
INV03
Output control
bit
0: A timer B2 interrupt occurs when the timer
A1 reload control signal is “1”.
1: A timer B2 interrupt occurs when the timer
A1 reload control signal is “0”.
Effective only in three-phase mode 1
0: Not specified.
1: Selected by the effective interrupt output
polarity selection bit.
Effective only in three-phase mode 1
0: Normal mode
1: Three-phase PWM output mode
0: Output disabled
1: Output enabled
0: Feature disabled
1: Feature enabled
0: Not detected yet
1: Already detected
0: Triangular wave modulation mode
1: Sawtooth wave modulation mode
1: Trigger generated
The value, when read, is “0”.
(Note 1)
T
hree-phase PWM control register 1
Symbol
INVC1
Address
0349
16
When reset
00
16
Bit name
Description
Bit symbol
W
R
INV10
INV11
INV12
Timer Ai start trigger
signal select bit
Timer A1-1, A2-1, A4-1
control bit
Short circuit timer count
source select bit
0: Timer B2 overflow signal
1: Timer B2 overflow signal,
signal for writing to timer B2
0: Three-phase mode 0
1: Three-phase mode 1
0 : Not to be used
1 : f
1
/2 (Note)
b7 b6
b5
b4
0
b3
b2
b1 b0
Noting is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0”.
Noting is assigned.
In an attempt to write to this bit, write “0”. The value, if read, turns out to be “0”.
Reserved bit
Always set to “0”
Note : To use three-phase PWM output mode, write “1” to INV12.
Note 1:
Note 2:
Note 3:
Note 4:
No value other than “0” can be written.
Selecting three-phase PWM output mode causes P8
0
, P8
1
, and P7
2
through P7
5
to output U, U, V, V, W, and W, and works the
timer for setting short circuit prevention time, the U, V, W phase output control circuits, and the circuit for setting timer B2 interrupt
frequency.
In triangular wave modulation mode:
The short circuit prevention timer starts in synchronization with the falling edge of timer Ai output.
The data transfer from the three-phase buffer register to the three-phase output shift register is made only once in synchronization
with the transfer trigger signal after writing to the three-phase output buffer register.
In sawtooth wave modulation mode:
The short circuit prevention timer starts in synchronization with the falling edge of timer A output and with the transfer trigger signal.
The data transfer from the three-phase output buffer register to the three-phase output shift register is made with respect to every
transfer trigger.
To write “1” both to bit 0 (INV00) and bit 1 (INV01) of the three-phase PWM control register, set in advance the content of the timer
B2 interrupt occurrences frequency set counter.
Figure 1.18.1. Registers related to timers for three-phase motor control
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