參數(shù)資料
型號(hào): M30625MGA-XXXGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, 0.65 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 20/143頁
文件大小: 3168K
代理商: M30625MGA-XXXGP
Mitsubishi microcomputers
M16C / 62A Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Clock asynchronous serial I/O (UART) mode
113
(a) Function for outputting a parity error signal
During reception, with the error signal output enable bit (bit 7 of address 037D16) assigned “1”, you
can output an “L” level from the TXD2 pin when a parity error is detected. And during transmission,
comparing with the case in which the error signal output enable bit (bit 7 of address 037D16) is as-
signed “0”, the transmission completion interrupt occurs in the half cycle later of the transfer clock.
Therefore parity error signals can be detected by a transmission completion interrupt program. Figure
1.14.22 shows the output timing of the parity error signal.
Figure 1.14.22. Output timing of the parity error signal
ST : Start bit
P : Even Parity
SP : Stop bit
D0
D1
D2
D3
D4
D5
D6
D7
P
SP
ST
Hi-Z
Transfer
clock
RxD2
TxD2
Receive
complete flag
“H”
“L”
“H”
“L”
“H”
“L”
“1”
LSB first
“0”
(b) Direct format/inverse format
Connecting the SIM card allows you to switch between direct format and inverse format. If you choose
the direct format, D0 data is output from TxD2. If you choose the inverse format, D7 data is inverted
and output from TxD2.
Figure 1.14.23 shows the SIM interface format.
Figure 1.14.23. SIM interface format
P : Even parity
D0
D1
D2
D3
D4
D5
D6
D7
P
Transfer
clcck
TxD2
(direct)
TxD2
(inverse)
D7
D6
D5
D4
D3
D2
D1
D0
P
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