參數(shù)資料
型號: M30625MGA-XXXGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, 0.65 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 30/143頁
文件大?。?/td> 3168K
代理商: M30625MGA-XXXGP
UART2 Special Mode Register 2
Mitsubishi microcomputers
M16C / 62A Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
122
Bit 4 of the UART2 special mode register 2 (address 037616) is used as the UART2 initialization bit.
Setting this bit to "1", and when the start condition is detected, the microcomputer operates as follows.
(1) The transmission shift register is initialized, and the content of the transmission register is transferred
to the transmission shift register. This starts transmission by dealing with the clock entered next as the
first bit. The UART2 output value, however, doesn’t change until the first bit data is output after the
entrance of the clock, and remains unchanged from the value at the moment when the microcomputer
detected the start condition.
(2) The reception shift register is initialized, and the microcomputer starts reception by dealing with the
clock entered next as the first bit.
(3) The SCL wait output bit turns to "1". This turns the SCL pin to "L" at the falling edge of the ninth bit of
the clock.
Starting to transmit/receive signals to/from UART2 using this function doesn’t change the value of the
transmission buffer empty flag. To use this function, choose the external clock for the transfer clock.
Bit 5 of the UART2 special mode register 2 (037616) is used as the SCL pin wait output bit 2. Setting this
bit to "1" with the serial I/O specified allows the user to forcibly output an "L" from the SCL pin even if
UART2 is in operation. Setting this bit to "0" frees the "L" output from the SCL pin, and the UART2 clock
is input/output.
Bit 6 of the UART2 special mode register 2 (037616) is used as the SDA output disable bit. Setting this bit
to "1" forces the SDA pin to turn to the high-impedance state. Refrain from changing the value of this bit
at the rising edge of the UART2 transfer clock. There can be instances in which arbitration lost detecting
flag is turned on.
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