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參數(shù)資料
| 型號： | M306N4FGTGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 6/28頁 |
| 文件大?。?/td> | 844K |
| 代理商： | M306N4FGTGP |
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Rev.2.40
Aug 25, 2006
page 12 of 88
REJ03B0003-0240
M16C/6N Group (M16C/6N4)
2. Central Processing Unit (CPU)
Under development
This document is under development and its contents are subject to change.
Figure 2.1 CPU Registers
2.1 Data Registers (R0, R1, R2, and R3)
The R0 register consists of 16 bits, and is used mainly for transfers and arithmetic/logic operations. R1 to
R3 are the same as R0.
The R0 register can be separated between high (R0H) and low (R0L) for use as two 8-bit data registers.
R1H and R1L are the same as R0H and R0L. Conversely R2 and R0 can be combined for use as a 32-bit
data register (R2R0). R3R1 is analogous to R2R0.
2.2 Address Registers (A0 and A1)
The A0 register consists of 16 bits, and is used for address register indirect addressing and address
register relative addressing. They also are used for transfers and arithmetic/logic operations. A1 is the
same as A0.
In some instructions, A1 and A0 can be combined for use as a 32-bit address register (A1A0).
2. Central Processing Unit (CPU)
Figure 2.1 shows the CPU Registers. The CPU has 13 registers. Of these, R0, R1, R2, R3, A0, A1, and FB
configure a register bank. There are two register banks.
SB
USP
ISP
b15
b0
Static Base Register
User Stack Pointer
Interrupt Stack Pointer
b19
b15
INTBL
INTBH
The upper 4 bits of INTB are INTBH and the lower 16 bits of INTB are INTBL.
b0
Interrupt Table Register
b19
PC
b0
Program Counter
R0H (R0's high bits) R0L (R0's low bits)
R1H (R1's high bits) R1L (R1's low bits)
R2
R3
b31
b15
b8 b7
b0
R2
R3
A0
A1
FB
Data Registers (1)
Address Registers (1)
Frame Base Registers (1)
NOTE:
1. These registers comprise a register bank. There are two register banks.
b15
b0
Carry Flag
Debug Flag
Zero Flag
Sign Flag
Register Bank Select Flag
Overflow Flag
Interrupt Enable Flag
Stack Pointer Select Flag
Reserved Area
Processor Interrupt Priority Level
Reserved Area
b15
b0
FLG
Flag Register
IPL
U
I
O
B
S
Z
D
C
b7
b8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M306N4FGVFP | 功能描述:IC M16C MCU FLASH 100QFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/60/6N4 標準包裝:60 系列:PSOC® 3 CY8C38xx 核心處理器:8051 芯體尺寸:8-位 速度:67MHz 連通性:EBI/EMI，I²C，LIN，SPI，UART/USART 外圍設(shè)備:電容感應，DMA，LCD，POR，PWM，WDT 輸入/輸出數(shù):25 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:2K x 8 RAM 容量:8K x 8 電壓 - 電源 (Vcc/Vdd):1.71 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 2x20b，D/A 4x8b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFQFN 裸露焊盤 包裝:托盤 |
| M306N4FGVFP#UKJ | 制造商:Renesas Electronics Corporation 功能描述:16-BIT M16C CISC - Bulk |
| M306N4FGVGP | 制造商:Renesas Electronics Corporation 功能描述: |
| M306N4FGVGP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
| M306N4MCT-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
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