- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45023 > M306NKFJTGP 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | M306NKFJTGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 61/86頁 |
| 文件大?。?/td> | 724K |
| 代理商： | M306NKFJTGP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁當前第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁
Rev.2.10
Aug 25, 2006
page 62 of 81
REJ03B0058-0210
M16C/6N Group (M16C/6NK, M16C/6NM)
5. Electric Characteristics (Normal-ver.)
Under development
This document is under development and its contents are subject to change.
4
(NOTE 1)
4
(NOTE 1)
0
4
(NOTE 2)
(NOTE 1)
–4
(NOTE 3)
(NOTE 4)
0
td(BCLK-AD)
th(BCLK-AD)
th(RD-AD)
th(WR-AD)
td(BCLK-CS)
th(BCLK-CS)
th(RD-CS)
th(WR-CS)
td(BCLK-RD)
th(BCLK-RD)
td(BCLK-WR)
th(BCLK-WR)
td(BCLK-DB)
th(BCLK-DB)
td(DB-WR)
th(WR-DB)
td(BCLK-HLDA)
td(BCLK-ALE)
th(BCLK-ALE)
td(AD-ALE)
th(ALE-AD)
td(AD-RD)
td(AD-WR)
tdZ(RD-AD)
ns
Address output delay time
Address output hold time (in relation to BCLK)
Address output hold time (in relation to RD)
Address output hold time (in relation to WR)
Chip select output delay time
Chip select output hold time (in relation to BCLK)
Chip select output hold time (in relation to RD)
Chip select output hold time (in relation to WR)
RD signal output delay time
RD signal output hold time
WR signal output delay time
WR signal output hold time
Data output delay time (in relation to BCLK)
Data output hold time (in relation to BCLK)
Data output delay time (in relation to WR)
Data output hold time (in relation to WR)
__________
HLDA output delay time
ALE signal output delay time (in relation to BCLK)
ALE signal output hold time (in relation to BCLK)
ALE signal output delay time (in relation to Address)
ALE signal output hold time (rin relation to Address)
RD signal output delay from the end of Address
WR signal output delay from the end of Address
Address output floating start time
Symbol
Parameter
Min.
Standard
Unit
Max.
Switching Characteristics
(Referenced to VCC = 3.3 V, VSS = 0 V, at Topr = –40 to 85 °C unless otherwise specified)
Table 5.45 Memory Expansion Mode and Microprocessor Mode
(for 2- to 3-wait setting, external area access and multiplexed bus selection)
50
40
50
40
25
8
Measuring
Condition
Figure 5.11
NOTES:
1. Calculated according to the BCLK frequency as follows:
0.5
109
f(BCLK)
– 10 [ns]
2. Calculated according to the BCLK frequency as follows:
(n –0.5)
109
f(BCLK)
– 50 [ns]
n is “2” for 2-wait setting, “3” for 3-wait setting.
3. Calculated according to the BCLK frequency as follows:
0.5
109
f(BCLK)
– 40 [ns]
4. Calculated according to the BCLK frequency as follows:
0.5
109
f(BCLK)
– 15 [ns]
VCC = 3.3 V
相關PDF資料 |
PDF描述 |
|---|---|
| M306NMME-XXXGP | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP128 |
| M306NKFHTGP | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| M306NNFHGP | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP128 |
| M306NLFHGP | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100 |
| M306NLFJGP | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M306NKFJVGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKFJVGP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
| M306NKME-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKMG-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKT-EPB | 功能描述:EMULATOR PROBE M16C/6N RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 配件 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 標準包裝:1 系列:- 附件類型:USB 至 1-Wire? RJ11 適配器 適用于相關產品:1-Wire? 設備 產品目錄頁面:1429 (CN2011-ZH PDF) |
發(fā)布緊急采購，3分鐘左右您將得到回復。