Rev.1.40
Oct 06, 2004
page 252 of 296
M306V7MG/MH/MJ-XXXFP, M306V7FG/FH/FJFP
Table 5.2.1 Recommended operating conditions (referenced to VCCI=3.3V±0.15V, VCCE=5.0V±0.25V,
Ta = – 20 oC to 70 oC unless otherwise specified)
5.2 Recommended Operating Conditions
P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P63,
P73 to P77, P82, P83, P86, P87, P90 to P92, P102 to P107,
XIN, OSC1, RESET, CNVSS, BYTE, Hsync, Vsync, XCIN
4.75
5.25
VccE
5.00
External I/O buffer voltage (
Note 3) P93, P94, P72, P71, P70, P67
V
0
Supply voltage
VIH
Vss
0.8VccI
V
VccI
HIGH Input voltage
V
VIL
High average output current
mA
V
0.5VccI
VccI
0.2VccI
VIH
0
LOW Input voltage
HIGH Input voltage
0.16VccI
High peak output current
LOW peak output current
–5.0
–10.0
10.0
5.0
mA
f(XIN)
Main clock input oscillation frequency (Note 4)
MHz
LOW average output current
mA
16.1
f (XcIN)
Sub-clock oscillation frequency
kHz
50.0
32.768
VIH
V
0.8VccI
VccI
P00 to P07, P10 to P17 (In the single-chip mode)
HIGH Input voltage
f OSC
MHz
30.1
7.9
30.1
14.9
f CVIN
––
31.47
16.206
15.262
15.734
kHz
VI
2.00
1.5
1.75
V
LOW average output current
P67, P70 to P72, P93, P94
6.0
mA
3.15
3.45
VccI
3.30
Internal logic supply voltage
(Note 3)
V
VIH
V
0.8VccE
VccE
P67, P70, P71, P72, P93, P94
HIGH Input voltage
VIL
0
0.2VccE
V
Internal oscillation mode
40.1
19.9
IOH (peak)
IOH (avg)
IOL (peak)
IOL (avg)
P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P63,
P73 to P77, P82, P83, P86, P87, P90 to P92, P102 to P107,
XIN, OSC1, RESET, CNVSS, BYTE, Hsync, Vsync, XCIN
P00 to P07, P10 to P17 (data input function during memory
expansion and microprocessor modes)
P67, P70, P71, P72, P93, P94
P00 to P07, P10 to P17 (In the single-chip mode)
P00 to P07, P10 to P17 (data input function during memory
expansion and microprocessor modes)
Input frequency
Input amplitude video signal
Horizontal sync. signal of 525i video signal
Horizontal sync. signal of 525p video signal
CVIN1, CVIN2
LC oscillating mode
Ceramic oscillating mode
Oscillation frequency (for OSD)
(Note 5)
P00 to P07, P10 to P17,P20 to P27, P30 to P37, P40 to P47,
P50 to P57,P60 to P63, P67, P72 to P77,P82, P83, P86, P87,
P90 to P94, P102 to P107, R, G, B, OUT1, OUT2
P00 to P07, P10 to P17,P20 to P27, P30 to P37, P40 to P47,
P50 to P57,P60 to P63, P67, P72 to P77, P82, P83, P86, P87,
P90 to P94, P102 to P107, R, G, B, OUT1, OUT2
P00 to P07, P10 to P17,P20 to P27, P30 to P37, P40 to P47,
P50 to P57,P60 to P63, P67, P70 to P77, P82, P83, P86, P87,
P90 to P94, P102 to P107, R, G, B, OUT1, OUT2
P00 to P07, P10 to P17,P20 to P27, P30 to P37, P40 to P47,
P50 to P57,P60 to P63, P73 to P77, P82, P83, P86, P87,
P90 to P92, P102 to P107, R, G, B, OUT1, OUT2
Notes1: The mean output current is the mean value within 100 ms.
2: The total IOH (peak) must be 80 mA max.
3: Connect 0.1
F or more capacitor externally between the power source pins VCCI-VSS, VCCI-CNVSS, VCCI-TVSETB, and
VCCE-Vss so as to reduce power source noise.
4: It is necessary to satisfy a timing necessary condition and the switching characteristic (after-mentioned).
5: It is necessary to satisfy fOSC
≤f(XIN)3.1
Typ.
Max.
Unit
Parameter
Symbol
Min
Standard