參數(shù)資料
型號: M306V8FJFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP116
封裝: 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件頁數(shù): 35/77頁
文件大?。?/td> 2650K
代理商: M306V8FJFP
M306V8FJFP
Rev.1.31
Apr 18, 2005
page 38 of 363
REJ03B0082-0131
Processor mode
Memory expansion mode or microprocessor mode
002(separate bus)
PM05–PM04 bits
012(CS2 is for multiplexed bus and
others are for separate bus)
102(CS1 is for multiplexed bus and
others are for separate bus)
Data bus width
BYTE pin
P00 to P07
D0 to D7
D0 to D7(Note)
P10 to P17
D8 to D15
D8 to D15(Note)
P20
A0
P21 to P27
A1 to A7
A1 to A7/D0 to D6
(Note 2)
P30
A8
A8/D7(Note 2)
P31 to P33
A9 to A11
P34 to P37
A12 to A15
I/O ports
P40 to P43
A16 to A19
I/O ports
P44
I/O ports
P45
P46
P47
P50
WRL
P52
RD
P53
BCLK
P54
HLDA
P55
HOLD
P56
ALE
P57
RDY
PM11=0
PM11=1
PM06=0
PM06=1
CS0=0
CS0=1
CS0
I/O ports
CS1=0
CS1=1
CS1
I/O ports
CS2=0
CS2=1
CS2
I/O ports
CS3=0
CS3=1
CS3
PM02=0
PM02=1
WR
WRL
P51
BHE
WRH
PM02=0
PM02=1
WRH
Note 1: When VCC1 is inputted into CNVSS1 pin, do not set bits PM05 and PM04 to “112” after reset.
Since P31 to P37, and P40 to P43 become I/O ports when bits PM05 snd PM04 are set to “112” in memory extension mode,
the area which can be accessed is 256 bytes per CS.
Note 2: In separate bus mode, these pins serve as the address bus.
Note 3: When accessing the area that uses a multiplexed bus, these pins output an indeterminate value during a write.
I/O ports: Function as I/O ports or peripheral function I/O pins.
16 bits
“L”
16 bits
“L”
Table 4.8. Pin Functions for Each Processor Mode
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