參數(shù)資料
型號(hào)： M30812MC-XXXGP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, MROM, 32 MHz, MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù)： 55/87頁
文件大小： 945K
代理商： M30812MC-XXXGP
page 57
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5. Electrical Characteristics (VCC=5V)
Figure 5.2 VCC=5V Timing Diagram (1)
BCLK
ALE
-2ns.min
RD
18ns.max
-5ns.min
Hi-Z
DB
0ns.min
td(BCLK-ALE)
th(BCLK-ALE)
tsu(DB-BCLK)
td(BCLK-RD)
26ns.min(1)
CSi
td(BCLK-CS)
18ns.max(1)
ADi
th(BCLK-AD)
-3ns.min
th(BCLK-CS)
-3ns.min
BHE
tcyc
td(BCLK-AD)
0ns.min
tac1(AD-DB)(2)
WR,WRL,
WRH
18ns.max
-3ns.min
BCLK
CSi
td(BCLK-CS)
18ns.max
ADi
td(BCLK-AD)
18ns.max
td(BCLK-ALE)
-3ns.min
tcyc
BHE
DBi
td(BCLK-WR)
ALE
18ns.max
-2ns.min
th(WR-DB)(1)
td(DB-WR)=(tcyc-20)ns.min
th(WR-DB)=(tcyc/2-10)ns.min
th(WR-AD)=(tcyc/2-10)ns.min
th(WR-CS)=(tcyc/2-10)ns.min
tw(WR)=(tcyc/2-15)ns.min
Vcc=5V
th(BCLK-RD)
th(RD-DB)
th(RD-AD)
th(RD-CS)
th(BCLK-WR)
th(BCLK-ALE)
th(BCLK-AD)
th(BCLK-CS)
th(WR-CS)(1)
th(WR-AD)(1)
tw(WR)(1)
tac1(RD-DB)(2)
18ns.max(1)
Read timing
Write timing ( written in 2 cycles with no wait state)
NOTES:
1. It varies with the operation frequency.
Measurement conditions
VCC=4.2 to 5.5V
Input high and low voltage: VIH=2.5V, VIL=0.8V
Output high and low voltage: VOH=2.0V, VOL=0.8V
Memory expansion mode and microprocessor mode (with no wait state)
NOTES:
1. A value is guaranteed with no external factor. Maximum 35ns is guaranteed for td(BCLK-AD)+tsu(DB-BCLK).
2. It varies with the operation frequency.
tac1(RD-DB)=(tcyc/2-35)ns.max
tac1(AD-DB)=(tcyc-35)ns.max
18ns.max
td(DB-WR)(1)
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