參數(shù)資料
型號(hào)： M30840MCT-XXXGP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, MROM, 32 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù)： 33/91頁(yè)
文件大?。?/td> 903K
代理商： M30840MCT-XXXGP
Page 37
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4. Special Function Registers (SFR)
)
T
4
8
/
C
2
3
M
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4
8
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2
3
M
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4
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M
Address
Register
Symbol
Value after RESET
035016
XX16
Timer B0 Register
TB0
035116
XX16
035216
XX16
Timer B1 Register
TB1
035316
XX16
035416
XX16
Timer B2 Register
TB2
035516
XX16
035616
Timer A0 Mode Register
TA0MR
0016
035716
Timer A1 Mode Register
TA1MR
0016
035816
Timer A2 Mode Register
TA2MR
0016
035916
Timer A3 Mode Register
TA3MR
0016
035A16
Timer A4 Mode Register
TA4MR
0016
035B16
Timer B0 Mode Register
TB0MR
00XX 00002
035C16
Timer B1 Mode Register
TB1MR
00XX 00002
035D16
Timer B2 Mode Register
TB2MR
00XX 00002
035E16
Timer B2 Special Mode Register
TB2SC
XXXX XXX02
035F16
Count Source Prescaler Register(1)
TCSPR
0XXX 00002
036016
036116
036216
036316
036416
UART0 Special Mode Register 4
U0SMR4
0016
036516
UART0 Special Mode Register 3
U0SMR3
0016
036616
UART0 Special Mode Register 2
U0SMR2
0016
036716
UART0 Special Mode Register
U0SMR
0016
036816
UART0 Transmit/Receive Mode Register
U0MR
0016
036916
UART0 Bit Rate Register
U0BRG
XX16
036A16
XX16
UART0 Transmit Buffer Register
U0TB
036B16
XX16
036C16
UART0 Transmit/Receive Control Register 0
U0C0
0000 10002
036D16
UART0 Transmit/Receive Control Register 1
U0C1
0000 00102
036E16
XX16
UART0 Receive Buffer Register
U0RB
036F16
XX16
037016
037116
037216
037316
037416
037516
037616
037716
037816
DMA0 Request Source Select Register
DM0SL
0X00 00002
037916
DMA1 Request Source Select Register
DM1SL
0X00 00002
037A16
DMA2 Request Source Select Register
DM2SL
0X00 00002
037B16
DMA3 Request Source Select Register
DM3SL
0X00 00002
037C16
XX16
CRC Data Register
CRCD
037D16
XX16
037E16
CRC Input Register
CRCIN
XX16
037F16
X: Indeterminate
Blank spaces are reserved. No access is allowed.
NOTES:
1. The TCSPR register maintains values set before reset, even after software reset or watchdog timer reset has
been performed.
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