參數(shù)資料
型號(hào)： M30L0R8000T0ZAQ
廠商： 意法半導(dǎo)體
英文描述： 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
中文描述： 256兆位（16Mb的x16插槽，多銀行，多層次，多突發(fā)）1.8V電源快閃記憶體
文件頁(yè)數(shù)： 67/83頁(yè)
文件大?。?/td> 1363K
代理商： M30L0R8000T0ZAQ
67/83
M30L0R8000T0, M30L0R8000B0
Note: 1. The variable P is a pointer which is defined at CFI offset 015h.
2. Bank Regions. There are two Bank Regions, see Tables
30
,
31
,
32
,
33
,
34
and
35
in
APPENDIX A.
Table 45. Bank and Erase Block Region 2 Information
(P+38)h = 142h
02h
Bank Regions 1 (Erase Block Type 2): BIts per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+39)h = 143h
03h
Bank Region 1 (Erase Block Type 2): Page mode and
Synchronous mode capabilities
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
Flash memory (top)
Flash memory (bottom)
Description
Offset
Data
Offset
Data
(P+32)h = 13Ch
01h
(P+3A)h = 144h
0Fh
Number of identical banks within bank region 2
(P+33)h = 13Dh
00h
(P+3B)h = 145h
00h
(P+34)h = 13Eh
11h
(P+3C)h = 146h
11h
Number of program or erase operations allowed in Bank
Region 2:
Bits 0-3: Number of simultaneous program operations
Bits 4-7: Number of simultaneous erase operations
(P+35)h = 13Fh
00h
(P+3D)h = 147h
00h
Number of program or erase operations allowed in other
banks while a bank in this region is programming
Bits 0-3: Number of simultaneous program operations
Bits 4-7: Number of simultaneous erase operations
(P+36)h = 140h
00h
(P+3E)h = 148h
00h
Number of program or erase operations allowed in other
banks while a bank in this region is erasing
Bits 0-3: Number of simultaneous program operations
Bits 4-7: Number of simultaneous erase operations
(P+37)h = 141h
02h
(P+3F)h = 149h
01h
Types of erase block regions in Bank Region 2
n = number of erase block regions with contiguous same-size
erase blocks.
Symmetrically blocked banks have one blocking region.
(2)
(P+38)h = 142h
0Eh
(P+40)h = 14Ah
0Fh
Bank Region 2 Erase Block Type 1 Information
Bits 0-15: n+1 = number of identical-sized erase blocks in
each bank
Bits 16-31: n×256 = number of bytes in erase block region
(P+39)h = 143h
00h
(P+41)h = 14Bh
00h
(P+3A)h = 144h
00h
(P+42)h = 14Ch
00h
(P+3B)h = 145h
02h
(P+43)h = 14Dh
02h
(P+3C)h = 146h
64h
(P+44)h = 14Eh
64h
Bank Region 2 (Erase Block Type 1)
Minimum block erase cycles × 1000
(P+3D)h = 147h
00h
(P+45)h = 14Fh
00h
(P+3E)h = 148h
02h
(P+46)h = 150h
02h
Bank Region 2 (Erase Block Type 1): BIts per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
Flash memory (top)
Flash memory (bottom)
Description
Offset
Data
Offset
Data
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參數(shù)描述
M30L0R8000T0ZAQE 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0ZAQF 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0ZAQT 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L40C 制造商:VISHAY 制造商全稱(chēng):Vishay Siliconix 功能描述:Dual Common-Cathode Schottky Rectifier
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