參數(shù)資料
型號(hào)： M32170F3VFG
廠商： Mitsubishi Electric Corporation
英文描述： 32-BIT RISC SINGLE-CHIP MICROCOMPUTER
中文描述： 32位RISC單片機(jī)
文件頁(yè)數(shù)： 36/49頁(yè)
文件大?。?/td> 561K
代理商： M32170F3VFG
Mitsubishi Microcomputers
36
2001-5-14 Rev.1.0
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
32170 Group, 32174 Group
Built-in Two Independent A-D Converters
The microcomputer contains two 16-channel converters with
10-bit resolution (A-D0 converter and A-D1 converter). In
addition to single conversion on each channel, continuous
A-D conversion on a combined group of 4, 8, and 16 chan-
nels is possible. The A-D converted value can be read out in
either 10 bits or 8 bits.
Table 19 Outline of the A-D Converters
Item
Content
Analog input
16 channels
×
2
A-D conversion method
Successive approximation method.
Resolution
10 bits (Conversion results can be read out in either 10 or 8 bits.)
Absolute accuracy (Note 1)
Normal rate mode
+2 LSB
+2 LSB
(Conditions: Ta = -40 ~ +125
°
C,
AVCC0,1 = VREF0,1 = 5.12V)
Double rate mode
Conversion mode
A-D conversion mode,comparator mode
Operation mode
Single mode, scan mode
Scan mode
Single -shot scan mode, continuous scan mode.
Conversion start trigger
Software start
Started by setting A-D conversion start bit to 1.
Hardware start
A-D0 converter started by MJT output event bus 3,
A-D1 converter started by TID1 overflow or underflow.
_____
Started by external ADTRG pin input.
Conversion rate
During single mode
Normal
299
×
1/ f (BCLK) (Note 2)
f(BCLK) : Internal peripheral clock
operating frequency
(Shortest time )
Double speed
173
×
1/ f (BCLK)
During comparator mode
Normal
47
×
1/ f (BCLK)
(Shortest time )
Double speed
29
×
1/ f (BCLK)
Interrupt request generation
When A-D conversion is finished, when comparate operation is finished, when single-shot
scan is finished, or when one cycle of continuous scan is finished.
DMA transfer request generation
(Note 3)
When A-D conversion is finished, when comparate operation is finished, when single-shot
scan is finished, or when one cycle of continuous scan is finished.
Note 1: The rated value of conversion accuracy here is that of the microcomputer's own as a single unit which can be exhibited when the
microcomputer is used in an environment where it may not be affected by the power supply wiring or noise on the board.
Note 2: When BCLK = 20 MHz, this is1/f (BCLK) = 50ns.
Note 3: The DMA transfer request generation function is available for only the A-D0 converter. The A-D1 converter does not have this function.
In addition to ordinary A-D conversion, the converters sup-
port comparator mode in which the set value and A-D con-
verted value are compared to determine which is larger or
smaller than the other.
When A-D conversion is finished, the converters can generated
a DMA transfer request (A-D0 converter only), as well as an
interrupt.
The A-D converters are interfaced using a dedicated power
supply to allow for connections to the peripheral circuits op-
erating with 5 V or 3.3V.
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