參數(shù)資料
型號(hào): M34250
廠商: Mitsubishi Electric Corporation
英文描述: Single Chip 4 Bits CMOS Microcomputer(4位單片機(jī))
中文描述: 4位單片微機(jī)的CMOS(4位單片機(jī))
文件頁數(shù): 22/58頁
文件大?。?/td> 331K
代理商: M34250
MITSUBISHI
ELECTRIC
22
MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Table 10 Control registers related to timer
V1
3
V1
2
V1
1
V1
0
Timer control register V1
Port G
1
(I/O)
T
OUT
pin (output)/port G
1
(input)
Prescaler stop (initial state) / timer 1 stop (state retained)
Prescaler / timer 1 operation
Interrupt disabled (SNZ1 instruction is valid)
Interrupt enabled (SNZ1 instruction is invalid)
Interrupt disabled (SNZ0 instruction is valid)
Interrupt enabled (SNZ0 instruction is invalid)
0
1
0
1
0
1
0
1
G
1
/T
OUT
pin function selection bit
Prescaler/timer 1 operation start bit
Timer 1 interrupt enable bit
External interrupt enable bit
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: Set a value to the bit 2 of register K0, and execute the SNZ0 instruction to clear the EXF0 flag to “0” after executing at least
one instruction. According to the input state of G
0
/INT pin, the external interrupt request flag (EXF0) may be set to “1” when
the interrupt valid waveform is changed.
at reset : 0000
2
R/W
at RAM back-up : 0000
2
K0
3
K0
2
K0
1
K0
0
Instruction clock divided by 4
Instruction clock divided by 512
Rising waveform (“L”
“H”)
Falling waveform (“H”
“L”)
Key-on wakeup not used
Key-on wakeup used (“L” level recognized)
Key-on wakeup not used
Key-on wakeup used (“L” level recognized)
Prescaler dividing ratio selection bit
Interrupt valid waveform for INT pin/
key-on wakeup valid waveform selection
bit (Note 2)
Ports G
1
–G
3
key-on wakeup control bit
Ports S
0
–S
3
key-on wakeup control bit
Key-on wakeup control register K0
at reset : 0000
2
at RAM back-up : state retained
0
1
0
1
0
1
0
1
R/W
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