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參數(shù)資料
| 型號： | M34250 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Single Chip 4 Bits CMOS Microcomputer(4位單片機(jī)) |
| 中文描述： | 4位單片微機(jī)的CMOS（4位單片機(jī)） |
| 文件頁數(shù)： | 28/58頁 |
| 文件大小： | 331K |
| 代理商： | M34250 |
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MITSUBISHI
ELECTRIC
28
MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
: Microcomputer starts its operation after 3584 to 3585 machine cycles for the time
required to stabilize the f(X
IN
) oscillation.
Stabilizing time a
POF instruction
is executed
A
f(X
IN
) oscillation
Return input
(Stabilizing time a )
B
(RAM back-up
mode)
f(X
IN
) stop
Reset
(Stabilizing time a )
K0
3
K0
2
K0
1
K0
0
Instruction clock divided by 4
Instruction clock divided by 512
Rising waveform (“L”
→
“H”)
Falling waveform (“H”
→
“L”)
Key-on wakeup not used
Key-on wakeup used (“L” level recognized)
Key-on wakeup not used
Key-on wakeup used (“L” level recognized)
Prescaler dividing ratio selection bit
Interrupt valid waveform for INT pin/
key-on wakeup valid waveform selection
bit (Note 2)
Ports G
1
–G
3
key-on wakeup control bit
Ports S
0
–S
3
key-on wakeup control bit
Key-on wakeup control register K0
at reset : 0000
2
at RAM back-up : state retained
0
1
0
1
0
1
0
1
R/W
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: Set a value to the bit 2 of register K0, and execute the SNZ0 instruction to clear the EXF0 flag after executing at least one
instruction. According to the input state of G
0
/INT pin, the external interrupt request flag (EXF0) may be set when the
interrupt valid waveform is changed.
Table 14 Key-on wakeup control register
Fig. 24 State transition
S
R
Q
Power down flag P
POF instruction
Reset input
G
Set source POF instruction is executed
G
Clear source Reset input
Fig. 25 Set source and clear source of the P flag
Fig. 26 Start condition identified example using the SNZP
instruction
Software start
P = “1”
Yes
Warm start
Cold start
No
(5) Key-on wakeup control register K0
Key-on wakeup control register K0
The interrupt valid waveform for INT pin/key-on wakeup
valid waveform selection bit, the ports G
1
–G
3
key-on
wakeup control bit and the ports S
0
–S
3
key-on wakeup
control bit are assigned to the register K0. Set the contents
of this register through register A with the TK0A instruction.
The TAK0 instruction can be used to transfer the contents
of register K0 to register A.
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