參數(shù)資料
型號(hào): M34282E2
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機(jī)的CMOS
文件頁數(shù): 16/70頁
文件大小: 560K
代理商: M34282E2
MITSUBISHI
ELECTRIC
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
16
MITSUBISHI MICROCOMPUTERS
4282 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
LOGIC OPERATION FUNCTION
The 4282 Group has the 4-bit logic operation function. The logic
operation between the contents of register A and the low-order
4 bits of register E is performed and its result is stored in register
A.
Each logic operation can be selected by setting logic operation
selection register LO.
Set the contents of this register through register A with the TLOA
instruction. The logic operation selected by register LO is
executed with the LGOP instruction.
Table 5 shows the logic operation selection register LO.
Table 5 Logic operation selection register LO
at reset : 00
2
at RAM back-up : 00
2
W
L
O
1
0
0
1
1
L
O
0
0
1
0
1
LO
1
LO
0
Logic operation selection bits
Logic operation selection register LO
Logic operation function
Exclusive logic OR operation (XOR)
OR operation (OR)
AND operation (AND)
Not available
Note: “W” represents write enabled.
WATCHDOG TIMER
Watchdog timer provides a method to reset and restart the system
when a program runs wild. Watchdog timer consists of 14-bit
timer (WDT) and watchdog timer flags (WDF1, WDF2).
Watchdog timer downcounts the instruction clock (INSTCK) as
the count source immediately after system is released from reset.
When the timer WDT count value becomes 0000
16
and underflow
occurs, the WDF1 flag is set to “1.” Then, when the WRST
instruction is not executed before the timer WDT counts 16383,
WDF2 flag is set to “1” and internal reset signal is generated and
system reset is performed.
Execute the WRST instruction at period of 16383 machine cycle
or less to keep the microcomputer operation normal.
Timer WDT is also used for generation of oscillation stabilization
time. When system is returned from reset and from RAM back-
up mode by key-input, software starts after the stabilization
oscillation time until timer WDT downcounts to 3E00
16
elapses.
Fig. 17 Watchdog timer function
Value of timer WDT
WDF2 flag
WRST
instruction
execution
S
r
e
y
s
e
t
e
t
m
s
Return
3
E
0
0
1
6
0
0
0
1
6
W
D
F
1
f
l
a
g
3
F
F
F
1
6
S
r
e
y
s
e
t
e
t
m
s
S
o
f
t
w
a
r
e
s
t
a
r
t
Software start
S
o
f
t
w
a
r
e
s
t
a
r
t
POF
instruction
execution
In
t
e
r
n
a
l
r
e
s
e
t
s
i
g
n
a
l
1
0
1
0
H
L
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