參數(shù)資料
型號(hào): M34282E2
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機(jī)的CMOS
文件頁數(shù): 47/70頁
文件大小: 560K
代理商: M34282E2
Skip condition
Detailed description
C
MITSUBISHI
ELECTRIC
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
47
MITSUBISHI MICROCOMPUTERS
4282 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Continuous
description
Overflow = 0
(CY) = 0
0/1
0/1
1
0
0/1
Loads the value n in the immediate field to register A.
When the LA instructions are continuously coded and executed, only the first LA instruction is executed
and other LA instructions coded continuously are skipped.
Transfers bits 7 to 4 to register B and bits 3 to 0 to register A when URS flag is cleared to “0.” These bits
7 to 0 are the ROM pattern in address (DR
2
DR
1
DR
0
A
3
A
2
A
1
A
0
) specified by registers A and D in
page p.
Transfers bit 8 of ROM pattern is transferred to flag CY when URS flag is set to “1” (after the URSC
instruction is executed).
(One of stack is used when the TABP p instruction is executed.)
Adds the contents of M(DP) to register A. Stores the result in register A. The contents of carry flag CY
remains unchanged.
Adds the contents of M(DP) and carry flag CY to register A. Stores the result in register A and carry flag
CY.
Adds the value n in the immediate field to register A.
The contents of carry flag CY remains unchanged.
Skips the next instruction when there is no overflow as the result of operation.
Sets (1) to carry flag CY.
Clears (0) to carry flag CY.
Skips the next instruction when the contents of carry flag CY is “0.”
Stores the one‘s complement for register A‘s contents in register A.
Rotates 1 bit of the contents of register A including the contents of carry flag CY to the right.
Executes the logic operation selected by logic operation selection register LO between the contents of
register A and register E, and stores the result in register A.
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