參數(shù)資料
型號(hào)： M34509G4-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封裝： 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù)： 97/145頁
文件大小： 1060K
代理商： M34509G4-XXXFP
4509 Group
Rev.1.03
2009.07.27
page 53 of 140
REJ03B0147-0103
Fig. 46 State transition
Fig. 47 Set source and clear source of the P flag
Fig. 48 Start condition identified example using the SNZP in-
struction
Reset
(Note 1)
A
Operation source clock:
f(RING)
On-chip oscillator
B
Operation source clock: f(XIN)
Ceramic resonator: operating
C
Operation source clock: f(XIN)
RC oscillation
CRCK instruction no execution
CRCK instruction execution
POF instruction execution
(Note 5)
POF instruction execution
D
RAM back-up
f(RING): stop
f(XIN): stop
POF instruction execution
Operating state
Key-on wakeup
(Note 6)
Operating state
High-speed mode
(Note 5)
Internal mode
(Note 2)
(Note 3)
(Note 4)
(MR0)←0
(MR0)←1
Notes 1: Microcomputer starts its operation after counting f(RING) 120 to 144 times from system is released from reset.
2: When changing the operation source clock from f(RING) to f(XIN), first make the setting to enable f(XIN) oscillation (set MR1 to “0”),
allow the oscillation stabilization time to elapse using software, and then set the operation source clock to f(XIN) (set MR0 to “0”).
After this, stop f(RING) (set RG0 to “1”). (Do not start f(XIN) oscillation and change the operation source clock at the same time.)
3: When changing the operation source clock from f(XIN) to f(RING), first make the setting to enable f(RING) oscillation (set RG0 to “0”),
allow the oscillation stabilization time to elapse using software, and then set the operation source clock to f(RING) (set MR0 to “1”).
After this, stop f(XIN) (set MR1 to “1”). (Do not change the operation source clock and stop f(XIN) at the same time.)
4: After system is released from reset, the ceramic oscillation circuit is selected for the main clock f(XIN).
When the RC oscillation circuit is used, execute the CRCK instruction.
5: Continuous execution of the EPOF instruction and the POF instruction is required to go into the RAM back-up state.
6: Microcomputer starts its operation after counting f(RING) 120 to 144 times.
System returns to state A certainly when returning from the RAM back-up mode. The operation mode (system clock frequency divided)
also returns to the initial state (internal frequency divided by 8 mode) (registers RG and MR initialized).
However, the selected contents (CRCK instruction execution state) of f(XIN) oscillation circuit is retained.
S
R
Q
Power down flag P
POF
instruction
Reset input
● Set source
● Clear source
Reset input
EPOF
instruction
POF instruction
EPOF instruction +
+
Program start
P = “1”
?
Yes
Warm start
Cold start
No
SNTP
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