參數(shù)資料
型號: M36L0R7040T0ZAQE
廠商: 意法半導體
英文描述: 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package
中文描述: 128兆位(多銀行,多層次,突發(fā))閃存和16兆移動存儲芯片,1.8V電源,多芯片封裝
文件頁數(shù): 8/18頁
文件大小: 119K
代理商: M36L0R7040T0ZAQE
M36L0R7040T0, M36L0R7040B0
8/18
FUNCTIONAL DESCRIPTION
The PSRAM and Flash memory components have
separate power supplies but share the same
grounds. They are distinguished by three Chip En-
able inputs: E
F
for the Flash memory and E1
P
and
E2
P
for the PSRAM.
Recommended operating conditions do not allow
more than one device to be active at a time. The
most common example is simultaneous read oper-
ations in the Flash memory and the PSRAM which
would result in a data bus contention. Therefore it
is recommended to put the other device in the high
impedance state when reading the selected de-
vice.
Figure 4. Functional Block Diagram
AI08468
RP
F
WP
F
L
F
E1
P
G
P
W
P
E2
P
UB
P
LB
P
DQ0-DQ15
V
DDF
V
PPF
A20-A22
16 Mbit
PSRAM
G
F
W
F
WAIT
F
K
F
V
SS
128 Mbit
Flash
Memory
V
DDP
E
F
A0-A19
V
DDQ
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