參數(shù)資料
型號(hào)： M36LLR876B0
廠商： 意法半導(dǎo)體
英文描述： 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
中文描述： 256 128兆位（多銀行，多層次，突發(fā)）64兆位閃存（突發(fā)）移動(dòng)存儲(chǔ)芯片，1.8V電源，多芯片封裝
文件頁數(shù)： 9/19頁
文件大小： 427K
代理商： M36LLR876B0
9/19
M36LLR8760T1, M36LLR8760D1, M36LLR8760M1, M36LLR8760B1
FUNCTIONAL DESCRIPTION
The PSRAM and Flash memory components have
separate power supplies but share the same
grounds. They are distinguished by three Chip En-
able inputs: E
F1
and E
F2
for Flash 1 and Flash 2,
respectively, and E
P
for the PSRAM.
Recommended operating conditions do not allow
more than one device to be active at a time. The
most common example is simultaneous read oper-
ations on one of the Flash memories and the
PSRAM which would result in a data bus conten-
tion. Therefore it is recommended to put the other
devices in the high impedance state when reading
the selected device.
Figure 4. Functional Block Diagram
AI10909b
E
P
G
P
W
P
CR
P
UB
P
LB
P
DQ0-DQ15
V
PPF
A0-A21
A23
64 Mbit
PSRAM
WAIT
K
V
DDQF
V
SS
Flash 2
128 Mbit
Flash
Memory
V
DDF2
V
CCP
L
RP
F
WP
F
W
F
Flash 1
256 Mbit
Flash
Memory
V
DDF1
E
F1
G
F1
E
F2
G
F2
A22
相關(guān)PDF資料
PDF描述
M36LLR876B0E 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36P0R9070E0 512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory 128 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
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M36P0R9070E0ZACF 512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory 128 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
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參數(shù)描述
M36LLR876B0E 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
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