參數(shù)資料
型號(hào): M37270MF-100SP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁(yè)數(shù): 15/94頁(yè)
文件大小: 1551K
代理商: M37270MF-100SP
MITSUBISHI MICROCOMPUTERS
M37270MF-XXXSP
M37270EF-XXXSP, M37270EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
15
Fig. 7. Structure of timer-related registers
7
0
Timer mode register 1
(TMR1 : address 00F4
16
)
Timer 1 count source selection bit 1
0 : f(X
IN
)/16 or f(X
CIN
)/16 (Note)
1 : Count source selected by bit 5
of TMR1
Timer 2 count source selection bit 1
0 : Count source selected by bit 4 of
TMR1
1 : External clock from P4
2
/TIM2
pin
Timer 1 count stop bit
0 : Count start
1 : Count stop
Timer 2 count stop bit
0 : Count start
1 : Count stop
Timer 2 count source selection bit 2
0 : f(X
IN
)/16 or f(X
CIN
)/16 (Note)
1 : Timer 1 overflow
Timer 1 count source selection bit 2
0 : f(X
IN
)/4096 or f(X
CIN
)/4096 (Note)
1 : External clock from P4
2
/TIM2
pin
Timer 5 count source selection bit 2
0 : Timer 2 overflow
1 : Timer 4 overflow
Timer 6 count source selection bit
0 : f(X
IN
)/16 or f(X
CIN
)/16 (Note)
1 : Timer 5 overflow
7
0
Timer mode register 2
(TMR2 : address 00F5
16
)
Timer 3 count stop bit
0 : Count start
1 : Count stop
Timer 4 count stop bit
0 : Count start
1 : Count stop
Timer 5 count stop bit
0 : Count start
1 : Count stop
Timer 6 count stop bit
0 : Count start
1 : Count stop
Timer 5 count source selection bit 1
0 : f(X
IN
)/16 or f(X
CIN
)/16 (Note)
1 : Count source selected by bit 6
of TMR1
Timer 3 count source selection bit
0
0 : f(X
IN
)/16 or f(X
CIN
)/16 (Note)
1 0 : f(X
CIN
)
0 1 :
1 1 :
P4
3
/TIM3 pin
(Bit 6 at
address
00C7
16
)
External clock from
Timer 4 count source selection bits
b4 b1
0 0 : Timer 3 overflow
0 1 : f(X
IN
)/16 or f(X
CIN
)/16 (Note)
1 0 : f(X
IN
)/2 or f(X
CIN
)/2 (Note)
1 1 : f(X
CIN
)
b0
Note :
Either f(X
IN
) or f(X
CIN
) is selected by bit 7 of the CPU mode register.
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