參數(shù)資料
型號(hào): M37542M2T-XXXGP
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP32
封裝: 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件頁(yè)數(shù): 89/139頁(yè)
文件大?。?/td> 1448K
代理商: M37542M2T-XXXGP
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)當(dāng)前第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)
7542 Group
Rev.3.02
Oct 31, 2006
Page 53 of 134
REJ03B0006-0302
[Transmit buffer register 2/receive buffer register 2 (TB2/
RB2)] 002E16
The transmit buffer register and the receive buffer register are lo-
cated at the same address. The transmit buffer is write-only and
the receive buffer is read-only. If a character bit length is 7 bits, the
MSB of data stored in the receive buffer is “0”.
[Serial I/O2 status register (SIO2STS)] 002F16
The read-only serial I/O2 status register consists of seven flags
(bits 0 to 6) which indicate the operating status of the serial I/O2
function and various errors.
Three of the flags (bits 4 to 6) are valid only in UART mode.
The receive buffer full flag (bit 1) is cleared to “0” when the receive
buffer register is read.
If there is an error, it is detected at the same time that data is
transferred from the receive shift register to the receive buffer reg-
ister, and the receive buffer full flag is set. A write to the serial I/O1
status register clears all the error flags OE, PE, FE, and SE (bit 3
to bit 6, respectively). Writing “0” to the serial I/O2 enable bit SIOE
(bit 7 of the serial I/O2 control register) also clears all the status
flags, including the error flags.
Bits 0 to 6 of the serial I/O2 status register are initialized to “0” at
reset, but if the transmit enable bit of the serial I/O2 control regis-
ter has been set to “1”, the transmit shift completion flag (bit 2)
and the transmit buffer empty flag (bit 0) become “1”.
[Serial I/O2 control register (SIO2CON)] 003016
The serial I/O2 control register consists of eight control bits for the
serial I/O2 function.
[UART2 control register (UART2CON)] 003116
The UART control register consists of four control bits (bits 0 to 3)
which are valid when asynchronous serial I/O is selected and set
the data format of an data transfer.
[Baud rate generator 2 (BRG2)] 003216
The baud rate generator determines the baud rate for serial transfer.
The baud rate generator divides the frequency of the count source
by 1/(n + 1), where n is the value written to the baud rate generator.
■ Notes on Serial I/O2
Serial I/O interrupt
When setting the transmit enable bit to “1”, the serial I/O transmit
interrupt request bit is automatically set to “1”. When not requiring
the interrupt occurrence synchronized with the transmission en-
abled, take the following sequence.
Set the serial I/O transmit interrupt enable bit to “0” (disabled).
Set the transmit enable bit to “1”.
Set the serial I/O transmit interrupt request bit to “0” after 1 or
more instructions have been executed.
Set the serial I/O transmit interrupt enable bit to “1” (enabled).
I/O pin function when serial I/O2 is enabled.
The functions of P06 and P07 are switched with the setting values
of a serial I/O2 mode selection bit and a serial I/O2 synchronous
clock selection bit as follows.
(1) Serial I/O2 mode selection bit → “1” :
Clock synchronous type serial I/O is selected.
Setup of a serial I/O2 synchronous clock selection bit
“0” : P06 pin turns into an output pin of a synchronous clock.
“1” : P06 pin turns into an input pin of a synchronous clock.
Setup of a SRDY2 output enable bit (SRDY)
“0” : P07 pin can be used as a normal I/O pin.
“1” : P07 pin turns into a SRDY2 output pin.
(2) Serial I/O2 mode selection bit → “0” :
Clock asynchronous (UART) type serial I/O is selected.
Setup of a serial I/O2 synchronous clock selection bit
“0”: P06 pin can be used as a normal I/O pin.
“1”: P06 pin turns into an input pin of an external clock.
When clock asynchronous (UART) type serial I/O is selected, it is
P07 pin. It can be used as a normal I/O pin.
相關(guān)PDF資料
PDF描述
M37542F8VGP 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP32
M37542M2V-XXXGP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP32
M37542M2V-XXXGP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP32
M37542M2-XXXSP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
M37542F8SP 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M37542M2-XXXFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M37542M2-XXXGP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M37542M2-XXXHP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M37542M2-XXXSP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M37542M4-XXXFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER