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參數(shù)資料
| 型號： | M37547G2-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO36 |
| 封裝： | 8.40 X 15 MM, 0.80 MM PITCH, PLASTIC, SSOP-36 |
| 文件頁數(shù)： | 49/97頁 |
| 文件大?。?/td> | 1064K |
| 代理商： | M37547G2-XXXFP |
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REJ03B0156-0122
Rev.1.22
Mar 31, 2009
page 53 of 94
7547 Group
Fig. 64 Block diagram of watchdog timer
Fig. 65 Structure of watchdog timer control register
Watchdog timer H (read only for high-order 6-bit)
Watchdog timer H count source selection bit
(Note 1, Note 4)
0 : Watchdog timer L underflow
1 : On-chip oscillator/16 or f(XIN)/16
b7
b0
Watchdog timer control register (Note 1)
(WDTCON: address 003916, initial value: 3F16)
STP instruction function selection bit
(Note 1, Note 3)
0 : System enters into the stop mode
at the STP instruction execution
1 : Internal reset occurs at the STP instruction execution
Notes 1: When the setting by the function set ROM data 2 (FSROM2) is performed, the initial value of CPUM is changed
after releasing reset since bits 6 and 7 of WDTCON are fixed.
2: The setting values of FSROM2 become valid by setting “0” to bit 0 of function set ROM data 0 (FSROM0).
The setting values of FSROM2 are invalid by setting “1” to this bit.
This cannot be controlled by FSROM2.
This bit function can be set by setting bit 3 of FSROM2.
Bit 3 of FSROM2 = 0: Bit 6 of WDTCON is fixed to “0”.
Bit 3 of FSROM2 = 1: Bit 6 of WDTCON is fixed to “1”.
Control by Function set ROM data 2
(FSROM2: address FFDA16) (Note 2)
The initial value of this bit is changed by setting bit 2 of
FSROM2.
Bit 2 of FSROM2 = 0:
Initial value of bit 7 of WDTCON is changed to “0”.
Bit 2 of FSROM2 = 1:
Initial value of bit 7 of WDTCON is changed to “1”.
The following setting can be available by setting bit 0 of FSROM2.
(This setting cannot be set by WDTCON)
Bit 0 of FSROM2 = 0: The source clock of watchdog timer is always
Bit 0 of FSROM2 = 1: The source clock of watchdog timer is the
on-chip oscillator output/16 of f(XIN)/16.
3:The setting value of this bit can be fixed after releasing reset by FSROM2, and then, the setting value cannot be changed by program.
Also, when the setting by program is performed, this bit can be rewritten only once after releasing reset.
After rewriting it is disable to write any data to this bit.
4: When FSROM2 is used to select the watchdog timer H count source, the initial value of this bit is changed after releasing reset.
the on-chip oscillator output/16.
“0”
“1”
1/16
Reset pin input
WDTCON: Watchdog timer control register
FSROM2: Function set ROM data 2
XIN clock
On-chip oscillator
CPUM: CPU mode register
Data bus
Reset
circuit
Watchdog timer H (8)
Write "FF16" to
WDTCON
Internal reset
Watchdog timer L (8)
STP Instruction
Write “FF16” to
WDTCON
Watchdog timer H count source
selection bit (bit 2 of FSROM2)
or bit 7 of WDTCON
Source clock selection
(auto-switch depending on setting of CPUM)
STP instruction function selection bit
(bit 3 of FSROM2)
Bit 6 of WDTCON
On-chip oscillator output can be
fixed by bit 0 of FSROM2
Count start
(Watchdotm timer start selection bit
(bit 1 of FSROM2))
or writing arbitrary value to WDTCON
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| M37547G4-XXXFP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO36 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M37547G4FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37547G4FP#U0 | 功能描述:MCU 2/5V 16K 36-SSOP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標準包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉換器:A/D 8x10b 振蕩器型:內部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M37547G4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37548G1FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37548G1-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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